US09768332B2
This infrared detection element includes a buffer layer (InAsSb layer) 3, a buffer layer (InAs layer) 4, and a light absorption layer (InAsSb layer) 5. A critical film thickness hc of the InAs layer satisfies a relation of hc
US09768328B2
A transparent electro-conductive laminate comprising: a substrate film made of a polyimide; and a thin film made of an electro-conductive material and stacked on the substrate film, wherein the polyimide is a polyimide containing at least one repeating unit represented by the following general formula (1): [in the formula (1), R1, R2, and R3 each independently represent one selected from the group consisting of a hydrogen atom, alkyl groups having 1 to 10 carbon atoms, and a fluorine atom, R4 represents an aryl group having 6 to 40 carbon atoms, and n represents an integer of 0 to 12], having a glass transition temperature of 350° C. to 450° C., and having a linear expansion coefficient of 30 ppm/° C. or less, the linear expansion coefficient being determined by measuring change in length under a nitrogen atmosphere and under a condition of a rate of temperature rise of 5° C./minute in a temperature range from 50° C. to 200° C.
US09768319B2
A modulation circuit includes a load and a transistor serving as a switch. The transistor has an oxide semiconductor layer in which hydrogen concentration is 5×1019/cm3 or less. The off-state current of the transistor is 1×10−13 A or less. A modulation circuit includes a load, a transistor serving as a switch, and a diode. The load, the transistor, and the diode are connected in series between the terminals of an antenna. The transistor has an oxide semiconductor layer in which hydrogen concentration is 5×1019/cm3 or less. An off-state current of the transistor is 1×10−13 A or less. On/off of the transistor is controlled in accordance with a signal inputted to a gate of the transistor. The load is a resistor, a capacitor, or a combination of a resistor and a capacitor.
US09768318B2
A miniaturized transistor, a transistor with low parasitic capacitance, a transistor with high frequency characteristics, or a semiconductor device including the transistor is provided. The semiconductor device includes a first insulator, an oxide semiconductor over the first insulator, a first conductor and a second conductor that are in contact with the oxide semiconductor, a second insulator that is over the first and second conductors and has an opening reaching the oxide semiconductor, a third insulator over the oxide semiconductor and the second insulator, and a fourth conductor over the third insulator. The first conductor includes a first region and a second region. The second conductor includes a third region and a fourth region. The second region faces the third region with the first conductor and the first insulator interposed therebetween. The second region is thinner than the first region. The third region is thinner than the fourth region.
US09768313B2
An embodiment is a structure including a first active device in a first region of a substrate, the first active device including a first layer of a two-dimensional (2-D) material, the first layer having a first thickness, and a second active device in a second region of the substrate, the second active device including a second layer of the 2-D material, the second layer having a second thickness, the 2-D material including a transition metal dichalcogenide (TMD), the second thickness being different than the first thickness.
US09768312B2
Embodiments of the present invention disclose a manufacturing method of a thin film transistor, a thin film transistor, an array substrate and a display device. The manufacturing method of a thin film transistor includes a step of forming an active layer, and the step of forming an active layer includes: forming a first poly-silicon layer and a second poly-silicon layer on the first poly-silicon layer separately, and adding dopant ions into the second poly-silicon layer and an upper surface layer of the first poly-silicon layer. By using the manufacturing method of a thin film transistor, defect states and unstable factors of interface in the thin film transistor can be reduced, thereby improving stability of the LTPS thin film transistor and obtaining an array substrate and a display device having more stable performance.
US09768307B2
An object is to provide a structure of a transistor which has a channel formation region formed using an oxide semiconductor and a positive threshold voltage value, which enables a so-called normally-on switching element. The transistor includes an oxide semiconductor stack in which at least a first oxide semiconductor layer and a second oxide semiconductor layer with different energy gaps are stacked and a region containing oxygen in excess of its stoichiometric composition ratio is provided.
US09768296B2
Metal-oxide-semiconductor (MOS) transistors with reduced subthreshold conduction, and methods of fabricating the same. Transistor gate structures are fabricated in these transistors of a shape and dimension as to overlap onto the active region from the interface between isolation dielectric structures and the transistor active areas. Minimum channel length conduction is therefore not available at the isolation-to-active interface, but rather the channel length along that interface is substantially lengthened, reducing off-state conduction.
US09768295B2
In one embodiment, the semiconductor devices relate to using one or more super-junction trenches for termination.
US09768293B1
A laterally diffused metal-oxide-semiconductor (LDMOS) transistor with a vertical channel region is provided. A first semiconductor region is formed over a second semiconductor region and with a first doping type. The second semiconductor region has a second doping type different than the first doping type. A gate electrode is formed laterally adjacent to the first semiconductor region and extending along a side boundary of the first semiconductor region. A first source/drain contact region and a second source/drain contact region are respectively formed on opposite sides of the gate electrode and with the second doping type. The first source/drain contact region is further formed over the first semiconductor region. A method for manufacturing the LDMOS transistor is also provided.
US09768290B2
A semiconductor device includes a semiconductor substrate, a body region of a first conductivity type in the substrate, a source region of a second conductivity type adjacent the body region, and a trench extending into the substrate. The trench contains a polysilicon gate electrode insulated from the substrate. The device further includes a dielectric layer on the substrate, a gate metallization on the dielectric layer and covering part of the substrate and a source metallization on the dielectric layer and electrically connected to the source region. The gate metallization includes two spaced apart fingers. The source metallization is spaced apart from the gate metallization and covers a different part of the substrate than the gate metallization. A metal-filled groove in the polysilicon gate electrode is electrically connected to the two spaced apart fingers, and extends along a length of the trench directly underneath at least part of the source metallization.
US09768289B2
A uni-terminal transistor device is described. In one embodiment, an n-channel transistor having p-terminal characteristics comprises a first semiconductor layer having a discrete hole level; a second semiconductor layer having a conduction band whose minimum level is lower than that of the first semiconductor layer; a wide bandgap semiconductor barrier layer disposed between the first and the second semiconductor layers; a gate dielectric layer disposed above the first semiconductor layer; and a gate metal layer disposed above the gate dielectric layer and having an effective workfunction selected to position the discrete hole level below the minimum level of the conduction band of the second semiconductor layer for zero bias applied to the gate metal layer and to obtain p-terminal characteristics.
US09768279B2
To provide a transistor formed using an oxide semiconductor film with reduced oxygen vacancies. To provide a semiconductor device that operates at high speed. To provide a highly reliable semiconductor device. To provide a miniaturized semiconductor device. The semiconductor device includes an oxide semiconductor film; a gate electrode overlapping with the oxide semiconductor film; a gate insulating film between the oxide semiconductor film and the gate electrode; and a protective insulating film that is above the oxide semiconductor film, the gate electrode, and the gate insulating film and includes a region containing phosphorus or boron.
US09768275B2
An array substrate for a liquid crystal display (LCD) device includes a common line and gate lines. The array substrate includes a first, second, and third passivation layer and thin film transistors (TFTs). The second passivation layer includes first and second holes respectively corresponding to a drain electrode and the common line. A common electrode on the second passivation layer includes a first opening corresponding to the TFTs and a second opening in the second hole. A drain contact hole through the third and first passivation layers exposes the drain electrode. A first common contact hole through the third passivation layer exposes the common electrode in the second hole. A second common contact hole through the third and first passivation layers exposes the common line, and a pixel electrode includes a third opening and a connection pattern connecting the common electrode to the common line on the third passivation layer.
US09768271B2
Methods of manufacturing device assemblies, as well as associated semiconductor assemblies, devices, systems are disclosed herein. In one embodiment, a method of forming a semiconductor device assembly includes forming a semiconductor device assembly that includes a handle substrate, a semiconductor structure having a first side and a second side opposite the first side, and an intermediary material between the semiconductor structure and the handle substrate. The method also includes removing material from the semiconductor structure to form an opening extending from the first side of the semiconductor structure to at least the intermediary material at the second side of the semiconductor structure. The method further includes removing at least a portion of the intermediary material through the opening in the semiconductor structure to undercut the second side of the semiconductor structure.
US09768262B2
Carbon-doped germanium stressor regions are formed in an nFET device region of a germanium substrate and at a footprint of a functional gate structure. The carbon-doped germanium stressor regions are formed by an epitaxial growth process utilizing monomethylgermane (GeH3—CH3) as the carbon source. The carbon-doped germanium stressor regions that are provided yield more strain in less volume since a carbon atom is much smaller than a silicon atom.
US09768254B2
A semiconductor device includes an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried dielectric therebetween. A device channel is formed in the thin semiconductor layer. Source and drain regions are formed at opposing positions relative to the device channel. The source and drain regions include an n-type material deposited on the buried dielectric within a thickness of the thin semiconductor layer. A gate structure is formed over the device channel.
US09768251B2
A method for manufacturing a semiconductor structure comprises the steps of: providing a substrate including a first semiconductor material; forming a dielectric layer on a surface of the substrate; forming an opening in the dielectric layer having a bottom reaching the substrate; providing a second semiconductor material in the opening and on the substrate, the second semiconductor material being en-capsulated by a further dielectric material thereby forming a filled cavity; melting the second semiconductor material in the cavity; recrystallizing the second semi-conductor material in the cavity; laterally removing the second semiconductor material at least partially for forming a lateral surface at the second semiconductor material; and forming a third semiconductor material on the lateral surface of the second semiconductor material, wherein the third semiconductor material is different from the second semiconductor material.
US09768247B1
A semiconductor device includes a charge-compensating region with a first structure disposed adjoining an end portion of the charge-compensating region. The first structure is configured to reduce charge-imbalances present in the charge-compensating region. In one embodiment, the first structure includes a trench that extends along the vertical depth of the charge-compensated trench so that the final charge-compensating region is provided without corner portions. In one embodiment, a material, such as a dielectric material and/or a polycrystalline semiconductor material, may be disposed within the trench and at least along the end portion of the charge-compensating region. Among other things, the first structure improves device electrical performance and manufacturing yields.
US09768245B2
A microelectronic device contains a high voltage component having a high voltage node and a low voltage node. The high voltage node is isolated from the low voltage node by a main dielectric between the high voltage node and low voltage elements at a surface of the substrate of the microelectronic device. A lower-bandgap dielectric layer is disposed between the high voltage node and the main dielectric. The lower-bandgap dielectric layer contains at least one sub-layer with a bandgap energy less than a bandgap energy of the main dielectric. The lower-bandgap dielectric layer extends beyond the high voltage node continuously around the high voltage node. The lower-bandgap dielectric layer has an isolation break surrounding the high voltage node at a distance of at least twice the thickness of the lower-bandgap dielectric layer from the high voltage node.
US09768244B1
A semiconductor device includes a first electrode layer and a second electrode layer. The first electrode layer extends in a first direction. The second electrode layer extends in the first direction for a different length from the first electrode layer, and is symmetric with respect to a center line of the first electrode layer in a second direction. The second electrode layer defines a capacitor with the first electrode layer.
US09768242B2
An organic light emitting diode display includes: a plurality of pixels including a first pixel, a second pixel, and a third pixel connected to the plurality of scan lines and the plurality of data lines, wherein each pixel includes a switching transistor connected to the scan line and the data line, a driving transistor connected to the switching transistor, an organic light emitting diode connected to the driving transistor, and a light emission control transistor between the driving transistor and the organic light emitting diode and configured to be turned on by the light emission control signal, and at least one pixel from among the first pixel, the second pixel, and the third pixel further includes a bypass transistor configured to bypass a portion of a driving current transmitted by the driving transistor.
US09768236B2
An organic light emitting diode display panel and a manufacturing method thereof. The display panel includes a plurality of pixel units arranged in arrays, each pixel unit has a first electrode layer, a second electrode layer and at least three light emitting layers. Each light emitting layer includes a planar light emitting layer and at least two annular light emitting layers disposed concentrically with the planar light emitting layer. The first electrode layer has a planar first electrode at a location that corresponds to the planar light emitting layer, and the first electrode layer has an annular first electrode at a location that corresponds to each annular light emitting layer.
US09768234B2
Providing a high-density two-terminal memory architecture(s) having performance benefits of two-terminal memory and relatively low fabrication cost, is described herein. By way of example, the two-terminal memory architecture(s) can be constructed on a substrate, in various embodiments, and comprise two-terminal memory cells formed within conductive layer recess structures of the memory architecture. In one embodiment, a conductive layer recess can be created as a horizontal etch in conjunction with a vertical via etch. In another embodiment, the conductive layer recess can be patterned for respective conductive layers of the two-terminal memory architecture.
US09768231B2
Multi-time programmable (MTP) random access memory (RRAM) devices and methods for forming a MTP RRAM device are disclosed. The method includes providing a substrate. The substrate is prepared with at least a first region for accommodating one or more multi-programmable based resistive random access memory (RRAM) cell. A fin-type based selector is provided over the substrate in the first region. A storage element of the RRAM cell is formed over the fin-type based selector. The fin-type based selector is coupled in series with the storage element of the RRAM cell.
US09768220B2
Some embodiments of the present disclosure relate to a deep trench isolation structure. This deep trench isolation structure is formed on a semiconductor substrate having an upper semiconductor surface. A deep trench, which has a deep trench width as measured between opposing deep trench sidewalls, extends into the semiconductor substrate beneath the upper semiconductor surface. A fill material is formed in the deep trench, and a dielectric liner is disposed on a lower surface and sidewalls of the deep trench to separate the fill material from the semiconductor substrate. A shallow trench region has sidewalls that extend upwardly from the sidewalls of the deep trench to the upper semiconductor surface. The shallow trench region has a shallow trench width that is greater than the deep trench width. A dielectric material fills the shallow trench region and extends over top of the conductive material in the deep trench.
US09768209B2
A display apparatus includes a base substrate, a pixel on the base substrate, and a color filter part between the base substrate and the pixel. The pixel includes a cover layer defining a TSC (Tunnel Shaped Cavity) on the base substrate, an image display part provided in the TSC, and first and second electrodes which apply an electric field to the image display part.
US09768196B2
A flexible display motherboard is disclosed. The motherboard includes a first group of flexible display units, where the first group includes at least one flexible display unit. The motherboard also includes a second group of flexible display units, where the second group includes at least one flexible display unit. The motherboard also includes one or more first grooves between the first and second groups.
US09768193B2
A three-dimensional (3D) semiconductor device includes a stack of conductive layers spaced from each other in a vertical direction, the stack having a staircase-shaped section in a connection region, and ends of the conductive layers constituting treads of the staircase-shaped section, respectively. The 3D semiconductor device further includes buffer patterns disposed on and protruding above the respective ends of the conductive layers, an interconnection structure disposed above the stack and including conductive lines, and contact plugs extending vertically between the conductive lines and the buffer patterns and electrically connected to the conductive layers of the stack via the buffer patterns.
US09768187B2
To provide a semiconductor device having improved performance. A method of manufacturing the semiconductor device includes forming, after formation of a control gate electrode and a memory gate electrode, a conductive film on an insulating film made of a high-dielectric-constant film via a metal film; patterning the conductive film and thereby forming a gate electrode including the metal film and the conductive film in a high-voltage MISFET region, while forming a metal film portion and a conductive film portion in a low-voltage MISFET region; and then, removing the conductive film portion from the low-voltage MISFET region, forming another conductive film on the metal film portion, and forming a gate electrode including the metal film portion and the another conductive film.
US09768183B2
An initial etch forms a trench over first contact areas of a plurality of NAND strings, the initial etch also forming individual openings over second contact areas of the plurality of NAND strings. Material is added in the trench to reduce an area of exposed bottom surface of the trench while maintaining the individual openings without substantial reduction of bottom surface area. Subsequent further etching extends the trench and the plurality of individual openings.
US09768181B2
Ferroelectric memory and methods of forming the same are provided. An example memory cell can include a buried recessed access device (BRAD) formed in a substrate and a ferroelectric capacitor formed on the BRAD.
US09768177B2
A method of forming conductive material of a buried transistor gate line includes adhering a precursor comprising tungsten and chlorine to material within a substrate trench. The precursor is reduced with hydrogen to form elemental-form tungsten material over the material within the substrate trench from the precursor.
US09768163B2
A semiconductor device includes a first gate pattern and a second gate pattern on a substrate, the first gate pattern having a first height and the second gate pattern having a second height, an insulating pattern on the substrate covering the first and second gate patterns, the insulating pattern including a trench exposing the substrate between the first and second gate patterns, a spacer contacting at least a portion of a sidewall of the insulating pattern within the trench, the spacer spaced apart from the first and second gate patterns and having a third height larger than the first and second heights, and a contact structure filling the trench.
US09768157B2
Disclosed herein are systems and method for voltage clamping in semiconductor circuits using through-silicon via (TSV) positioning. A semiconductor die is disclosed that includes a silicon substrate, a bipolar transistor having collector, emitter, base and sub-collector regions disposed on the substrate, and a through-silicon via (TSV) positioned within 35 μm of the sub-collector region in order to clamp a peak voltage of the bipolar transistor at a voltage limit level.
US09768156B1
An IC includes first and second designs of experiments (DOES), each comprised of at least two fill cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The first DOE contains fill cells configured to enable non-contact (NC) detection of side-to-side shorts, and the second DOE contains fill cells configured to enable NC detection of chamfer shorts.
US09768148B2
A stacked memory with interface providing offset interconnects. An embodiment of memory device includes a system element and a memory stack coupled with the system element, the memory stack including one or more memory die layers. Each memory die layer includes first face and a second face, the second face of each memory die layer including an interface for coupling data interface pins of the memory die layer with data interface pins of a first face of a coupled element. The interface of each memory die layer includes connections that provide an offset between each of the data interface pins of the memory die layer and a corresponding data interface pin of the data interface pins of the coupled element.
US09768147B2
Systems and methods are described for improved heat dissipation of the stacked semiconductor dies by including metallic thermal pads between the dies in the stack. In one embodiment, the thermal pads may be in direct contact with the semiconductor dies. Heat dissipation of the semiconductor die stack can be improved by a relatively high thermal conductivity of the thermal pads that directly contact the adjacent silicon dies in the stack without the intervening layers of the low thermal conductivity materials (e.g., passivation materials). In some embodiments, the manufacturing yield of the stack can be improved by having generally coplanar top surfaces of the thermal pads and under-bump metallization (UBM) structures.
US09768144B2
Embodiments of the present disclosure provide an apparatus comprising a semiconductor substrate having a first surface, a second surface that is disposed opposite to the first surface, wherein at least a portion of the first surface is recessed to form a recessed region of the semiconductor substrate, and one or more vias formed in the recessed region of the semiconductor substrate to provide an electrical or thermal pathway between the first surface and the second surface of the semiconductor substrate, and a die coupled to the semiconductor substrate, the die being electrically coupled to the one or more vias formed in the recessed region of the semiconductor substrate. Other embodiments may be described and/or claimed.
US09768134B2
A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.
US09768131B2
A wiring (3) comprising electrical conductors (4, 5, 6, 7) is formed in a dielectric layer (2) on or above a semiconductor substrate (1), an opening is formed in the dielectric layer to uncover a contact pad (8), which is formed by one of the conductors, and a further opening is formed in the dielectric layer to uncover an area of a further conductor (5), separate from the contact pad. The further opening is filled with an electrically conductive material (9), and the dielectric layer is thinned from a side opposite the substrate, so that the electrically conductive material protrudes from the dielectric layer.
US09768129B2
A semiconductor device includes a semiconductor die, a semiconductor integrated circuit and a three-dimensional crack detection structure. The semiconductor die includes a central region and a peripheral region surrounding the central region. The semiconductor integrated circuit is formed in the central region. The three-dimensional crack detection structure is formed in a ring shape in the peripheral region to surround the central region. The three-dimensional crack detection structure is expanded in a vertical direction. Using the three-dimensional crack detection structure, the crack penetration of various types may be detected thoroughly.
US09768122B2
An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.
US09768121B2
Stacked microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a stacked microelectronic device assembly can include a first known good packaged microelectronic device including a first interposer substrate. A first die and a first through-casing interconnects are electrically coupled to the first interposer substrate. A first casing at least partially encapsulates the first device such that a portion of each first interconnect is accessible at a top portion of the first casing. A second known good packaged microelectronic device is coupled to the first device in a stacked configuration. The second device can include a second interposer substrate having a plurality of second interposer pads and a second die electrically coupled to the second interposer substrate. The exposed portions of the first interconnects are electrically coupled to corresponding second interposer pads.
US09768118B1
A semiconductor device includes a semiconductor substrate, and a dielectric layer on an upper surface of the semiconductor substrate. A contact stack is formed in the dielectric layer. The contact stack includes an electrically conductive contact element, and a contact liner on first and second opposing sidewalls of the contact element. A first air gap is interposed between the dielectric layer and the contact liner on the first side wall, and a second air gap interposed between the dielectric layer and the contact liner on the second side wall.
US09768112B2
According to an exemplary embodiment, a semiconductor device is provided. The semiconductor device includes a first seal ring and a first circuit. The first circuit includes a first capacitor and a first inductor connected in series. The first circuit is connected between the first seal ring and a ground.
US09768106B2
A chip-on-film (COF) package includes a base film, a semiconductor chip mounted on a chip mounting region of a top surface of the base film, a plurality of top inner output conductive patterns, a plurality of bottom inner output conductive patterns and a plurality of landing vias. The top inner output conductive patterns are formed on the top surface of the base film and respectively connected to chip inner output pads formed on a bottom surface of the semiconductor chip. The bottom inner output conductive patterns are formed on a bottom surface of the base film. The landing vias are formed to vertically penetrate the base film and to respectively connect the top inner output conductive patterns and the bottom inner output conductive patterns. The landing vias are arranged within the chip mounting region to form a two-dimensional shape.
US09768105B2
System and method are disclosed for creating a rigid interconnect between two substrate mounted packages to create a package-on-package assembly. A solid interconnect may have a predetermined length configured to provide a predetermined package separation, may be cylindrical, conical or stepped, may be formed by extrusion, casting, drawing or milling and may have an anti-oxidation coating. The interconnect may be attached to mounting pads on the top and bottom packages via an electrically conductive adhesive, including, but not limited to solder and solder paste. A solder preservative or other anti-oxidation coating may be applied to the mounting pad. A package-on-package assembly with solid interconnects may have a top package configured to accept at least one electronic device, with the solid interconnects mounted between the top package and a bottom package to rigidly hold the package about parallel to each other.
US09768102B2
A method of manufacture of an integrated circuit packaging system includes: forming a one-layer substrate with a symmetrical structure, the one-layer substrate having a redistribution pad and an insulation, the redistribution pad only at an insulation top side of the insulation; mounting an integrated circuit over the one-layer substrate; and forming an encapsulation over the integrated circuit.
US09768086B2
The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
US09768083B1
A process for making and using a semiconductor wafer includes instantiating first and second designs of experiments (DOEs), each comprised of at least two fill cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The first DOE contains fill cells configured to enable non-contact (NC) detection of merged-via opens, and the second DOE contains fill cells configured to enable NC detection of snake opens. The process may further include obtaining NC measurements from the first and/or second DOE(s) and using such measurements, at least in part, to selectively perform additional processing, metrology or inspection steps on the wafer, and/or on other wafer(s) currently being manufactured.
US09768078B2
An integrated circuit is formed by removing a sacrificial gate dielectric layer and a sacrificial gate to form a gate cavity. A conformal dielectric first liner is formed in the gate cavity and a conformal second liner is formed on the first liner. A first etch removes the second liner from the bottom of the gate cavity, leaving material of the second liner on sidewalls of the gate cavity. A second etch removes the first liner from the bottom of the gate cavity exposed by the second liner, leaving material of the first liner on the bottom of the gate cavity under the second liner on the sidewalls of the gate cavity. A third etch removes the second liner from the gate cavity, leaving an L-shaped spacers of the first liner in the gate cavity. A permanent gate dielectric layer and replacement gate are formed in the gate cavity.
US09768074B2
A method of forming a transistor can include forming a gate mask on a substrate having a vertical location aligned with that of a transistor control gate; implanting first conductivity type dopants with the gate mask as an implant mask to form a first shallow halo region; implanting first conductivity type dopants with at least the gate mask as an implant mask to form a first deep halo region having a peak dopant concentration profile at a greater substrate depth than the first shallow halo region; forming an epitaxial layer on top of the substrate; forming a first control gate structure on the epitaxial layer; and forming a first source or drain region, of a second conductivity type, in at least the epitaxial layer to a side of the first control gate, and over the first shallow halo region and the first deep halo region.
US09768069B2
A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate with an insulating layer formed thereon. The method includes forming a gate dielectric layer in the first opening and the second opening. The method includes forming a film over the gate dielectric layer. The method includes forming a first work function metal layer in the first opening. The method includes depositing a second work function metal layer in the first opening and the second opening and in direct contact with the first work function metal layer in the first opening and the film in the second opening. A first deposition rate of the second work function metal layer over the first work function metal layer is greater than a second deposition rate of the second work function metal layer over the film.
US09768046B2
A wafer storage container includes a shell body including a first side body and a second side body that face, an upper body connected with upper parts of the first side body and the second side body, a rear body connected with an end of one side of each of the first side body and the second side body, and a lower body connected with lower parts of the first side body and the second side body, and configured to define an internal space together with the first side body, the second side body, the upper body, and the rear body.
US09768036B2
A power semiconductor substrate comprising an insulating planar base, at least one conductor track and at least one contact area as part of the conductor track, wherein a layer of a metallic material is disposed on the contact area by means of pressure sintering. The associated method comprises the steps of: producing a power semiconductor substrate that includes a planar insulating base, conductor tracks and contact areas; arranging a pasty layer, composed of a metallic material and a solvent, on at least one contact area of the power semiconductor substrate; and applying pressure to the pasty layer.
US09768021B2
Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly. A block copolymer at least within a trench in the substrate and including at least one soluble block and at least one insoluble block may be annealed to form a self-assembled pattern including a plurality of repeating units of the at least one soluble block laterally aligned with the trench and positioned within a matrix of the at least one insoluble block. The self-assembled pattern may be exposed to a metal oxide precursor that impregnates the at least one soluble block. The metal oxide precursor may be oxidized to form a metal oxide. The self-assembled pattern may be removed to form a pattern of metal oxide lines on the substrate surface. Semiconductor device structures are also described.
US09768010B2
A liquid treatment apparatus includes a substrate holder (21) that holds a substrate horizontally and rotates the substrate, a treatment liquid nozzle (82) that supplies a treatment liquid to the substrate held by the substrate holder, a cup (40) that is arranged outside of a peripheral edge of the substrate held by the substrate holder and receives the treatment liquid which has been supplied to the substrate by the treatment liquid nozzle, a top plate (32) that covers the substrate held by the substrate holder from above, a top plate rotation driving mechanism that rotates the top plate, and a liquid receiving member (130) that surrounds a peripheral edge of the top plate and has a circular liquid receiving space (132).
US09768005B1
A device and method are disclosed to apply ESI-based mass spectroscopy to submicrometer and nanometer scale aerosol particles. Unipolar ionization is utilized to charge the particles in order to collect them electrostatically on the tip of a tungsten rod. Subsequently, the species composing the collected particles are dissolved by making a liquid flow over the tungsten rod. This liquid with dissolved aerosol contents is formed into highly charged droplets, which release unfragmented ions for mass spectroscopy, such as time-of-flight mass spectroscopy. The device is configured to operate in a switching mode, wherein aerosol deposition occurs while solvent delivery is turned off and vice versa.
US09768004B2
The invention provides interfaces between analytical instruments, e.g., between chromatography systems and mass spectrometers. In an exemplary embodiment, an ion source is provided for connecting a carbon dioxide-based chromatograph device to a mass spectrometer. The ion source includes a first conduit for receiving eluent from the chromatography device, a heater for heating at least a portion of said first conduit, a second conduit in fluid communication with the first conduit, an inlet for receiving eluent from said second conduit and introducing the eluent into an ion source region to form a plume of gas and/or liquid in the ion source region, and an ionization promoting inlet for injecting an ionization promoting fluid into the ion source region to interact with the plume to promote ionization of at least some of the plume.
US09768001B2
A method of quantifying a target analyte by mass spectrometry includes obtaining a mass spectrometer signal comprising a first calibrator signal, comprising a second calibrator signal, and potentially comprising a target analyte signal from a single sample comprising a first known quantity of a first calibrator, comprising a second known quantity of a second calibrator, and potentially comprising a target analyte. The first known quantity and the second known quantity are different, and wherein the first calibrator, the second calibrator, and the target analyte are each distinguishable in the single sample by mass spectrometry. The method also includes quantifying the target analyte in the single sample using the first calibrator signal, the second calibrator signal, and the target analyte signal.
US09767988B2
Systems, methods and apparatus for regulating ion energies in a plasma chamber and chucking a substrate to a substrate support are disclosed. An exemplary method includes placing a substrate in a plasma chamber, forming a plasma in the plasma chamber, controllably switching power to the substrate so as to apply a periodic voltage function (or a modified periodic voltage function) to the substrate, and modulating, over multiple cycles of the periodic voltage function, the periodic voltage function responsive to a defined distribution of energies of ions at the surface of the substrate so as to effectuate the defined distribution of ion energies on a time-averaged basis.
US09767971B2
An electronic apparatus is disclosed. An electronic apparatus comprises a housing, a press switch, a push button, and a cable. The press switch is located in the housing. The push button is a button for pressing the press switch. The cable connects a first electronic part located in the push button to a second electronic part located closer to the inside than the first electronic part and located in the housing. The cable has a fixed portion that is part of the cable between the first electronic part and the second electronic part and that is fixed to the housing. The push button does not face the fixed portion in a direction in which the push button moves by being pushed.
US09767970B2
A key structure includes a connecting plate, a keycap, a triggering element, a scissors-type connecting element, a membrane switch circuit member, and a supporting plate. The keycap includes a protrusion part. The supporting plate includes an accommodation part and an elastic structure. The elastic structure is aligned with the protrusion part and disposed within the accommodation part. When the keycap is depressed, the protrusion part is moved with the keycap to push the triggering element. Consequently, the membrane switch circuit member is triggered by the triggering element. Moreover, as the protrusion part is moved with the keycap, the protrusion part collides with the elastic structure to generate a sound.
US09767967B2
A switch unit includes a current switching device drivable by an electromagnetic actuator for opening/closing an electric circuit associated with the switch unit, a first energy storage for storing electric energy for the electromagnetic actuator, and electronic controller means which are supplied by an external power line and control a supply of the electric energy from the energy storage means to the electromagnetic actuator. The switch unit includes emergency procedure operating means associated with the electronic controller means and provided with a second energy storage means. The emergency procedure operating means are configured for enabling driving of the current switching device and opening the associated electric circuit in an emergency condition in which a lack or drop or irregular supply of the external power line is experienced.
US09767963B2
A solid electrolytic capacitor that comprises an anode that contains a dielectric formed on a sintered porous body is provided. The sintered porous body is formed from a valve metal powder having a specific charge of about 100,000 microFarads*Volts per gram or more. The solid electrolyte overlies the anode, and includes an intrinsically conductive polymer containing repeating units having the following formula (I): wherein, R is (CH2)a—O—(CH2)b; a is from 0 to 10; b is from 1 to 18; Z is an anion; and X is a cation.
US09767934B2
A method, system, and apparatus for the thermoelectric conversion of nuclear reactor generated heat including thermoelectrically converting gas cooled nuclear reactor generated heat to electrical energy and supplying the electrical energy to an operation system of the nuclear reactor system.
US09767922B2
Provided is a memory device including a memory cell array including a normal area in which a plurality of memory cells are arranged, and a redundancy area in which a plurality of redundancy memory cells are arranged, and a repair controller configured to control a repair operation on a defect cell from among the plurality of memory cells according to a first repair unit, and switch a repair unit from the first repair unit to a second repair unit different from the first repair unit when the repair operation based on the first repair unit is completed.
US09767916B2
The present disclosure relates to a shift register and a display apparatus, wherein the shift register comprising an input module, a pull-down module, an inversion module and a first pull-up module; wherein, the input module supplies an input signal voltage to a pull-down node in response to a first clock signal, wherein the pull-down node is an output node of the input module; the pull-down module stores the input signal voltage and supplies a second clock signal to an output terminal in response to the pull-down node; the inversion module supplies a positive power supply voltage or a negative power supply voltage to a first pull-up node in response to the pull-down node; and the first pull-up module supplies the positive power supply voltage to the output terminal in response to the first pull-up node. Some or all the floating nodes in the shift register are not floated any more by improvement; as an alternative, the sources/drains of the TFTs subjected to the effects of the floating nodes are controlled so that the output stability of the shift register is improved.
US09767912B2
An method of operating a memory system including a plurality of memory cells includes changing an operation mode at least some of the memory cells which operate based on a first operation mode to operate based on a second operation mode; and performing a change erase operation on the memory cells for which an operation mode is changed on the basis of a change erase condition when the operation mode is changed. When memory cells operate in the first operation mode, a normal erase operation is performed based on a first erase condition, and when memory cells operate in the second operation mode, a normal erase operation is performed based on a second erase condition. The change erase condition is different from at least one of the first and second erase conditions.
US09767908B2
A non-volatile semiconductor memory device includes a first memory cell above a substrate and electrically connected to a first word line, a second memory cell above the first memory cell and electrically connected to a second word line, and a controller. The controller is configured to execute a write operation that includes a first step in which a first voltage is applied to a selected word line and to a non-selected word line, a second step after the first step in which a program voltage is applied to the selected word line, and a third step after the second step in which a second voltage higher than the first voltage is applied to the non-selected word line. A time period between a start of the second step and a start of the third step is different depending on whether the first or second memory cell is being written.
US09767905B2
A bit scan circuit includes N scan blocks corresponding with an N-bit string of binary data. The string is scanned using an input clock signal to count the number of bits having a predetermined binary value. Each scan block includes a single latch to transfer the corresponding bit and to indicate reset. The scan blocks are organized into groups. Each group is enabled by a corresponding token signal. The token signal for each group is asserted after each preceding scan block indicates a pass value. When enabled by its token signal, the first scan block in a group is reset by a first clock signal. A second scan block in the group is enabled for reset after the first scan block indicates the pass value. The second scan block in the group is reset by a second clock signal having pulses that precede corresponding pulses from the first clock signal.
US09767903B2
A memory module includes a nonvolatile memory device and a volatile memory device connected to a first data channel through a first input/output port and to a second data channel through a second input/output port. The volatile memory device activates one of the first and second input/output ports based on an operation mode. The memory module includes a registering clock driver that transmits a first control signal for data exchange through the first input/output port and a second control signal for data exchange through the second input/output port, to the volatile memory device. A memory controller of the memory module generates the second control signal, exchanges data with the volatile memory device through the second data channel, and controls the nonvolatile memory device. The memory controller detects a request from a host or a power status and generates the second control signal based on the detection result.
US09767897B2
A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).
US09767890B2
A static random-access memory is described. The SRAM includes a storage cell and a voltage supply to supply the storage cell with a reduced voltage during a write operation. The SRAM cell includes a first pass gate and a second pass gate. A first resistor is coupled between the first pass gate and a first side of the storage cell. A second resistor is coupled between the second pass gate and a second side of the storage cell.
US09767889B1
A die is provided having an unterminated endpoint that capacitively loads its input impedance with a capacitance from capacitor while acting as a receiving endpoint and that isolates its output impedance from the capacitance while acting as a transmitting endpoint.
US09767887B2
A memory device includes a first memory cell, a second memory cell, a precharge circuit, a sense amplifier, a switch circuit, and a controller. The first memory cell is connected to a first bit line, the second memory cell is connected to a second bit line, and the precharge circuit connected between the first bit line and the second bit line. The sense amplifier includes a first input terminal and a second input terminal. The switch circuit is connected to the first bit line and the first input terminal and to the second bit line and the second input terminal and is configured to control a connection between the first bit line and the first input terminal and a connection between the second bit line and the second input terminal in response to a switch signal. The controller is configured to generate the switch signal in response to a command.
US09767886B2
A technique to increase transfer rate of command and address signals via a given number of command and address pins in each of one or more integrated circuit memory devices during a clock cycle of a clock signal. In one example embodiment, the command and address signals are sent on both rising and falling edges of a clock cycle of a clock signal to increase the transfer rate and essentially reduce the number of required command and address pins in each integrated circuit memory device.
US09767882B2
A method of refreshing a memory device includes performing normal refresh operations on memory cell rows in response to a refresh command and performing self-refresh operations on the memory cell rows according to a refresh clock signal in response during a self-refresh mode of the memory device between a self-refresh enter command and a self-refresh exit command. The refresh clock signal has a first self-refresh cycle before the self-refresh begins and a second self-refresh cycle, which may be longer than the first self-refresh cycle, after the self-refresh begins. In some examples, no self-refresh may be performed by the memory device during a self-refresh mode.
US09767879B2
A method of setting the reference voltage for sensing data states in integrated circuits including ferroelectric random access memory (FRAM) cells of the one-transistor-one capacitor (1T-1C) type. In an electrical test operation, some or all of the FRAM cells are programmed to a particular polarization state. A “shmoo” of the reference voltage for sensing the data state is performed, at one or more worst case electrical or environmental conditions for that data state, to determine a reference voltage limit at which the weakest cell fails to return the correct data when read. A configuration register is then written with a reference voltage based on this reference voltage limit, for example at the limit plus/minus a tolerance.
US09767875B2
A method uses a memory that includes a plurality of non-volatile memory (NVM) cells; a plurality of word lines; a plurality of bit lines; and an amplifier having an inverting input, a non-inverting input, and an output; and a capacitance coupled to the inverting input includes. A reference is coupled to the non-inverting input. The output of the amplifier is coupled to the inverting input of the amplifier while the non-inverting input receives the reference. The output is decoupled from the inverting input to store a voltage on the inverting input of the amplifier. A non-volatile (NV) element of a first NVM cell of the plurality of NVM cells is coupled to the non-inverting input. An output signal representative of the state of the NVM cell is provided.
US09767868B2
Providing memory training of dynamic random access memory (DRAM) systems using port-to-port loopbacks, and related methods, systems, and apparatuses are disclosed. In one aspect, a first port within a DRAM system is coupled to a second port via a loopback connection. A training signal is sent to the first port from a System-on-Chip (SoC), and passed to the second port through the loopback connection. The training signal is then returned to the SoC, where it may be examined by a closed-loop training engine of the SoC. A training result corresponding to a hardware parameter may be recorded, and the process may be repeated until an optimal result for the hardware parameter is achieved at the closed-loop training engine. By using a port-to-port loopback configuration, the DRAM system parameters regarding timing, power, and other parameters associated with the DRAM system may be trained more quickly and with lower boot memory usage.
US09767867B2
A computer system is disclosed including a printed circuit board (PCB) including a plurality of traces, at least one processor mounted to the PCB to couple to some of the plurality of traces, a heterogeneous memory channel including a plurality of sockets coupled to a memory channel bus of the PCB, and a memory controller coupled between the at least one processor and the heterogeneous memory channel. The heterogeneous memory channel includes a plurality of sockets coupled to a memory channel bus of the PCB. The plurality of sockets are configured to receive a plurality of different types of memory modules. The memory controller may be a programmable heterogeneous memory controller to flexibly adapt to the memory channel bus to control access to each of the different types of memory modules in the heterogeneous memory channel.
US09767864B1
The present disclosure includes apparatuses and methods related to storing a data value in a sensing circuitry element. An example method comprises sensing a first data value with a sense amplifier of a sensing circuitry element, moving a second data value from a first storage location of a compute component to a second storage location of the compute component, and storing, in the first storage location, a third data value resulting from a logical operation performed on the first data value and the second data value. The logical operation can be performed by logic circuitry of the sensing circuitry element.
US09767863B2
According to one embodiment, a memory device includes: a first storage area configured to store data; a first sense amplifier; a first data latch; a first selector configured to select either connection between the first data latch and the first sense amplifier or connection between the first data latch and another sense amplifier; and a second selector configured to select either connection between the first storage area and the first sense amplifier or connection between another storage area and the first sense amplifier.
US09767861B2
A circuit provides a regulated voltage supply for other circuits. The circuit includes a bias current source and a reference voltage source. The circuit includes a pass transistor and a feedback transistor. The pass transistor receives input from the feedback transistor that generates a regulated voltage at a terminal of the pass transistor. The feedback transistor receives inputs from the regulated voltage of the pass transistor and the reference voltage source. The feedback transistor provides voltage for the input of the pass transistor, thereby controlling the regulated voltage generated by the pass transistor. The regulated voltage generated by the pass transistor is provided as a regulated voltage supply to other circuits.
US09767857B2
Subject matter disclosed herein relates to methods and apparatus, such as memory devices and systems including such memory devices. In one apparatus example, a plurality of block configurations may be employed. Block configurations may include an arrangement of similarly doped semiconductor switches. Block configurations may select a respective tile of a memory array, a particular memory cell of the respective tile, and select a memory operation to apply to the particular memory cell. Immediately adjacent block configurations within a particular slice of the memory array may be substantially mirrored and immediately adjacent block configurations in separate immediately adjacent slices of the memory array may be substantially similar. Similarly doped diffusion regions for similarly doped semiconductor switches in substantially mirrored block configurations may be arranged to electrically share a common potential signal value level. Other apparatus and methods are also disclosed.
US09767856B2
The present disclosure provides a chassis housing an increased density of smaller storage devices. The chassis houses one or more power supplies, one or more input/output modules, and hot swappable, front accessible field replaceable units. The field replaceable units have a depth that is greater than their width and height, so as to accommodate dual storage devices one in front of the other. The proximal storage device connects to a midplane of the chassis via an interposer card situated between the proximal and distal storage devices. The interposer card conditions any signals that exhibit signal integrity problems after traversing between the midplane and the interposer card. The interposer card connects to the midplane via a bridge card and a flexible connector running underneath the distal storage device. Each field replaceable unit is placed into the front end of the chassis in a vertical orientation with respect to the chassis.
US09767852B2
Systems and methods determine, identify and/or detect one or more audio mismatches between at least two digital media files by providing a group of digital media files to a computer system as input files. Each digital media file comprises digital audio and digital video signals previously recorded at a same performance by a same artist, and the digital media files are previously synchronized with respect to each other and aligned on a timeline of the same performance and provide a first multi-angle digital video of the same performance. The systems and methods compare audio features based on the audio signals of each digital media file and detect at least one audio mismatch between at least two digital media files of the group based on compared audio features, wherein the at least one audio mismatch is generated by, caused by or based on one or more previously edited digital media files present within the group.
US09767850B2
A software application for mobile devices enables users to easily create a fully-edited short video by combining video clips of various lengths to form a final video that resembles a Hollywood-style, professionally edited video clip. The videos are automatically edited to the music cuts using pre-programmed storyboards and transitions that align with the user's thematic selection. There are few steps involved in the process making for a user-friendly experience. The professional style video clip is produced on a user's phone in only 45 seconds and can then be shared with friends via email, YouTube, Facebook and other forms of social media.
US09767845B2
Providing a method for browsing portions of videos called video previews. The video previews may be associated with a link or predefined duration of a full video, such that the video preview is generated from a portion of the full video and viewed by a user. The video previews are configured to play a series of images associated with images from the portion of the full video when the video preview is activated.
US09767844B1
An information recording method of recording information is provided in an information recording medium having a plurality of recording layers including a first recording layer and a second recording layer located to be closer to a surface than the first recording layer, each of the plurality of recording layers includes a user data area for recording user data, a spare area for alternatively recording data of failed recording into the user data area, and a management information area for recording management information. The first recording layer is used as a recording object layer at start of recording. When any one of the user data area, the spare area, and the management information area of the first recording layer runs short of a free space, then the recording object layer of the user data area, the spare area, and the management information area is switched over to the second recording layer.
US09767840B2
The disclosed embodiments provide a system that drives a display from a computer system. During operation, the system writes graphical output to protected memory and drives the display from the protected memory. If the graphical output lacks protection, the system discontinues the driving of the display from the protected memory. In particular, upon detecting a lack of protection in the graphical output, the system continues to drive the display from the protected memory during a grace period associated with the lack of protection in the graphical output. The system then discontinues driving of the display from the protected memory if protection of the graphical output does not resume during the grace period.
US09767830B2
An apparatus according to one embodiment includes a magnetic sensor structure, a magnetic shield having at least one laminate pair comprising a magnetic layer and an electrically nonconductive nonmagnetic layer, and a nonmagnetic spacer layer between the sensor structure and the magnetic shield. In one embodiment, a deposition thickness of the nonconductive nonmagnetic layer in each laminate pair is about 10% or less of a total deposition thickness of the laminate pair. In another embodiment, a deposition thickness of the nonconductive nonmagnetic layer in each laminate pair is between about 1 and about 12 nanometers. In yet another embodiment, the magnetic shield has at least one second laminate pair, and a nonlaminated magnetic portion sandwiched between the at least one laminate pair and the at least one second laminate pair.
US09767829B2
A speech signal processing apparatus and a speech signal processing method for enhancing speech intelligibility are provided. The speech signal processing apparatus includes an input signal gain determiner to determine a gain of an input signal based on a harmonic characteristic of a voiced speech, a voiced speech output unit to output a voiced speech in which a harmonic component is preserved by applying the gain to the input signal, a linear predictive coefficient determiner to determine a linear predictive coefficient based on the voiced speech, and an unvoiced speech preserver to preserve an unvoiced speech of the input signal based on the linear predictive coefficient.
US09767826B2
Method and apparatus to determine a speaker activity detection measure from energy-based characteristics of signals from a plurality of speaker-dedicated microphones, detect acoustic events using power spectra for the microphone signals, and determine a robust speaker activity detection measure from the speaker activity measure and the detected acoustic events.
US09767822B2
An electronic device configured for encoding a watermarked signal is described. The electronic device includes modeler circuitry. The modeler circuitry determines parameters based on a first signal and a first-pass coded signal. The electronic device also includes coder circuitry coupled to the modeler circuitry. The coder circuitry performs a first-pass coding on a second signal to obtain the first-pass coded signal and performs a second-pass coding based on the parameters to obtain a watermarked signal.
US09767816B2
According to an aspect of the present invention, a method for reconstructing an audio signal having a baseband portion and a highband portion is disclosed. The method includes obtaining a decoded baseband audio signal by decoding an encoded audio signal and obtaining a plurality of subband signals by filtering the decoded baseband audio signal. The method further includes generating a high-frequency reconstructed signal by copying a number of consecutive subband signals of the plurality of subband signals and obtaining an envelope adjusted high-frequency signal. The method further includes generating a noise component based on a noise parameter. Finally, the method includes adjusting a phase of the high-frequency reconstructed signal and obtaining a time-domain reconstructed audio signal by combining the decoded baseband audio signal and the combined high-frequency signal to obtain a time-domain reconstructed audio signal.
US09767815B2
Provided are a voice audio encoding device, voice audio decoding device, voice audio encoding method, and voice audio decoding method that efficiently perform bit distribution and improve sound quality. Dominant frequency band identification unit identifies a dominant frequency band having a norm factor value that is the maximum value within the spectrum of an input voice audio signal. Dominant group determination units and non-dominant group determination unit group all sub-bands into a dominant group that contains the dominant frequency band and a non-dominant group that contains no dominant frequency band. Group bit distribution unit distributes bits to each group on the basis of the energy and norm variance of each group. Sub-band bit distribution unit redistributes the bits that have been distributed to each group to each sub-band in accordance with the ratio of the norm to the energy of the groups.
US09767809B2
A method of compressing the audio dynamics of an audio signal. The method includes a step of acquiring an audio signal; a step of selecting a first instant of the audio signal; a step of calculating a plurality of partial gains corresponding, respectively, to a plurality of observation windows of the audio signal that are centered on the first instant, the width of the observation windows following a geometric progression with a rate and first term that are predefined; a step of summing the partial gains calculated in a first corrective term; and a step of applying the first corrective term to the audio signal at the first instant.
US09767805B2
The present disclosure provides a voice recognition method for use in an electronic apparatus comprising a voice input module. The method comprises: receiving voice data by the voice input module; performing a first pattern voice recognition on the received voice data, including identifying whether the voice data comprises a first voice recognition information; performing a second pattern voice recognition on the voice data if the voice data comprises the first voice recognition information; and performing or refusing an operation corresponding to the first voice recognition information according to a result of the second pattern voice recognition. The present disclosure also provides a voice controlling method, an information processing method, and an electronic apparatus.
US09767793B2
The technology of the present application provides a speech recognition system with at least two different speech recognition engines or a single engine speech recognition engine with at least two different modes of operation. The first speech recognition being used to match audio to text, which text may be words or phrases. The matched audio and text is used by a training module to train a user profile for a natural language speech recognition engine, which is at least one of the two different speech recognition engines or modes. An evaluation module evaluates when the user profile is sufficiently trained to convert the speech recognition engine from the first speech recognition engine or mode to the natural language speech recognition or mode.
US09767789B2
Techniques disclosed herein include systems and methods that improve audible emotional characteristics used when synthesizing speech from a text source. Systems and methods herein use emoticons identified from a source text to provide contextual text-to-speech expressivity. In general, techniques herein analyze text and identify emoticons included within the text. The source text is then tagged with corresponding mood indicators. For example, if the system identifies an emoticon at the end of a sentence, then the system can infer that this sentence has a specific tone or mood associated with it. Depending on whether the emoticon is a smiley face, angry face, sad face, laughing face, etc., the system can infer use or mood from the various emoticons and then change or modify the expressivity of the TTS output such as by changing intonation, prosody, speed, pauses, and other expressivity characteristics.
US09767787B2
A method for speaker verification is disclosed. The method comprises using at least one hardware processor for: providing a development set comprising multiple voice samples of multiple speakers uttering a predefined development text, prompting a test text to a target speaker, wherein the test text is different from the development text, and recording a test sample of the target speaker uttering the test text, synthesizing a set of artificial voice samples based on the multiple voice samples, wherein each of the artificial voice samples simulates a different speaker of the multiple speakers uttering the test text, and verifying an identity of the target speaker based on the set of artificial voice samples and on the test sample of the target speaker.
US09767786B2
A system and method for quieting unwanted sound. As a non-limiting example, various aspects of this disclosure provide a system and method, for example implemented in a premises-based or home audio system, for quieting unwanted sound at a particular location.
US09767781B2
Disclosed technology allows a whistle to be magnetically detachable from a base portion, such as a finger grip. Some embodiments comprise a whistle component comprising a first magnetic member and a base component comprising a second magnetic member, such that the first and second magnetic members are magnetically attracted to each other. The whistle component can be detachable from the base component by breaking a magnetic bond between the first and second magnetic members. At least one of the first and second magnetic members can be at least partially covered by a non-magnetic material such that the non-magnetic material separates the first and second magnetic members when the whistle component is magnetically coupled to the base component. The first magnetic member can be contained within a cavity of an adaptor that is attached to the whistle, or within the whistle itself.
US09767779B2
A switch is constituted by a movable conductive portion and a pair of fixed conductive portions. The fixed conductive portions are arranged on a substrate, and are each constituted by at least one strip member. A first main conductive pattern and a second main conductive pattern are arranged on the substrate in correspondence with the fixed conductive portions. The movable conductive portion electrically shorts the pair of fixed conductive portions upon coming into contact with both of them. The strip members that constitute the fixed conductive portions each have a first end portion and a second end portion in the extending direction, and the end portions are electrically connected to the corresponding main conductive patterns.
US09767771B2
The invention relates to an attachment arrangement for the strings of a stringed instrument, especially a guitar. To the body of the stringed instrument is attached a bridge body, first restraining means for restraining the strings from the first end area, second restraining means, which are arranged in conjunction with the bridge body for restraining the strings from the second end area. Lever means are arranged in conjunction with the bridge body in order to move the second restraining means for temporarily loosening and/or tightening the strings by means of a lever part included in the lever means. The lever means are provided with moving means comprising at least one moving mechanism, which is a mechanism separate from the lever means. One or more second restraining means are arranged to move with respect to the bridge body. The moving means are arranged to transmit the movement of the lever means into the desired movement of one or more restraining means.
US09767760B2
A driving device for a display device wherein the display device and a source driver are connected by a plurality of external lines. A bias voltage generating part generates a bias voltage for controlling internal operating current of the plurality of amplifiers in the source driver to supply to each amplifier via a bias voltage supply line. The bias voltage supply line is laid out such that for the amplifier connected to the external line of a longer length, the length of the bias voltage supply line from the bias voltage generating part to the amplifier is shorter so as to raise a bias voltage supplied to the amplifier.
US09767753B2
A scan driver includes a plurality of stages configured to supply scan signals to scan lines. An ith (i is a natural number) stage of the stages at one side of a panel includes: a first transistor connected between a first input terminal and a first node, and including a gate electrode connected to a second input terminal; a second transistor connected between a third input terminal and a first output terminal for outputting an ith scan signal of the scan signals, and including a gate electrode connected to the first node; a third transistor connected between the first output terminal and a first power input terminal configured to receive a first off voltage, and including a gate electrode connected to the second input terminal; and a first capacitor connected between the first node and the first output terminal.
US09767750B2
The present disclosure discloses a GOA unit for co-driving a gate electrode and a common electrode, including: a trigger; a first selective input circuit; a second selective input circuit which is used to respectively gate the high level input for common electrode and the high level input for gate electrode to the clock end of the trigger in different time sequences to pull up the voltage on the trigger output end; a third selective input circuit which is used to select level signals or edge signals on gate line n+1 and gate line n+4 to serve as the reset signal of the trigger; a fourth selective input circuit which is used to pull down the voltage thereon; a selective output circuit with the input being connected to the trigger output end, for selectively outputting a gate electrode driving signal or a common electrode driving signal.
US09767748B2
An object is to provide a convenient display device which consumes sufficiently small amount of power and a method for driving such a display device. The display device can be in an off state with a still image displayed in a still image display mode in which a pixel electrode and a common electrode which are for applying a voltage to the display element are brought into a floating state so that a voltage applied to the display element is held, and a still image is displayed without further supply of a potential. The display device is put to an off state with a desired image displayed in the still image display mode, whereby the display device can have a higher level of security and can be more convenient.
US09767744B2
The present invention provides a polarity inversion driving method for a liquid crystal display panel. The polarity inversion driving method comprises a step of performing polarity inversion on groups of pixel units according to a preset period, wherein each group of pixel units comprises rows of pixel units sequentially arranged in a same column, and a gate on-state duration of the first row of pixel unit in each group of pixel units is longer than the gate on-state duration of the remaining rows of pixel units in the group of pixel units. Correspondingly, the present invention further provides a polarity inversion driving device for a liquid crystal display panel. According to the present invention, when N-dot inversion driving is performed on the liquid crystal panel, charging times of respective rows of pixel units in each group of pixel units are closer.
US09767738B2
A projection system is provided that uses an additional light valve in series with at least one color sub-assembly and respective light valve in order to increase the contrast of a projected image, wherein bit sequences are generated for the additional light valve that do not result in interference with the respective light valve bit sequences.
US09767729B2
An organic light emitting display device includes pixels divided by scan lines and data lines, and including first transistors for controlling the amount of current flowing from a first power source to a second power source through organic light emitting diodes, first feedback lines and second feedback lines formed in parallel to the data lines, control lines formed in parallel to the scan lines, and a sensing unit configured to extract at least one of voltage drop of the first power source and deterioration information of the first transistor from the pixels via the first feedback lines and the second feedback lines.
US09767720B2
A see-through, near-eye, mixed reality display apparatus providing a mixed reality environment wherein one or more virtual objects and one or more real objects exist within the view of the device. Each of the real and virtual have a commonly defined set of attributes understood by the mixed reality system allowing the system to manage relationships and interaction between virtual objects and other virtual objects, and virtual and real objects.
US09767714B2
A label assembly including one or more dissolvable thermal direct adhesive labels and methods of assembly and use. According to one embodiment, each label includes a base layer, a thermal direct layer, an adhesive layer, and a barrier layer. The base layer, which has an upper surface and a lower surface, is water-dissolvable and may be made of a water-dissolvable paper. The thermal direct layer is positioned directly over the upper surface of the base layer and functions in the conventional manner to produce markings therein in response to heat. The adhesive layer is water-dissolvable and is positioned below the lower surface of the base layer. The barrier layer, which is positioned directly below the lower surface of the base layer and directly over the adhesive layer, serves to prevent migration of the adhesive layer through the base layer and into contact with the thermal direct layer.
US09767708B2
In one embodiment, a medicament system configured to communicate information about a medicament device or about a use of a medicament device, or a combination thereof, to a user, is provided. The medicament system may include a medicament device including a housing, and a collateral device, wherein the collateral device may include an information detecting and/or receiving component configured to receive information from the medicament device and/or a sending component configured to send information to the medicament device, and optionally at least one of: a) a signal output component; b) a microprocessor; c) a storage medium component; and d) a power source, and wherein the medicament device may be configured to generate information detectable by the collateral device, or transmit information to the collateral device, wherein the collateral device may be configured to detect and/or receive information about the medicament device from the medicament device and provide information about the medicament device and/or a feedback about a use of the medicament device to a user of the system. The medicament device may further include a transmitter configured to communicate information and/or signals from the medicament device to the collateral device and/or a remote device, and/or receive information and/or signals from a collateral device and/or a remote device.
US09767707B2
An optimization engine builds a set of test forms, called a pallet for use in a qualification test setting. The pallet is generated using a optimization engine programmed with constraints and goals for each test form in the pallet and for the pallet in general. A test information floor is set at the cut point of the test which causes test items to be focused at the area of the test where the pass/fail decision is made. The test items may be separated into families by assigning test items selected for a test form in each test generation cycle to one of several families. Because each family has unique test items compared to other families, a person re-taking a qualification test from a particular pallet may be given a test form from another family, ensuring that no item from the first administration will appear on the subsequent test.
US09767706B2
Bowing platforms are disclosed for use in playing a bowed musical instrument without reliance on strings. A bowing platform includes a support and a track that replace the strings, bridge, and tailpiece on a conventional bowed instrument, to provide an alternative vibrational bowing surface. The bowing platform can be attached to a conventional fingerboard or to the body of the instrument. In one aspect, the bowing platform is useful as a bow guide to improve bow technique by restricting the player's bow angle to be within a desirable range, while still allowing for natural arm movement. The bowing platform can be further equipped with piezoelectric sensors to sense bowing motion and to create sound electronically in response to the sensed motion. A stringless bowed instrument includes a bowing platform, bowing sensors, and pitch sensors that sense finger placement along the fingerboard.
US09767699B1
An apparatus and method can provide a warning of a drone or unmanned aerial vehicle in the vicinity of an airport. The apparatus can include at least one antenna directionally disposed at an along the approach or departure path and a detector configured to provide a warning of a presence of sense an unmanned aerial or drone. The warning can be provided in response to a radio frequency signal received by the at least one of the antenna being in a frequency band associated with a transmission frequency for the unmanned aerial vehicle or drone or in a frequency band associated with interaction from receive circuitry of the unmanned aerial vehicle or drone.
US09767697B2
A method for automated enrollment and activation of a mobile telematics system comprising receiving a customer data record of a customer at a communication services database, determining a command signal based on the customer data record, sending the command signal to a telematics unit of a vehicle, enrolling the customer in a telematics-unit access system based on the command signal and activating the telematics unit of the telematics-unit access system based on the command signal.
US09767692B1
An apparatus is adapted to be in electro-mechanically communication with a vehicle and configured to record information related to crash investigation and early warning. The device records and stores information as well as analyzes it to provide an occupant of the vehicle early warning as to potential hazards that arise.
US09767691B1
The invention includes a vehicular sensor node, circuit apparatus and their operations. Power from power source is controlled for delivery to radio transceiver and magnetic sensor, based upon a task trigger and task identifier. The radio transceiver and the magnetic sensor are operated based upon the task identifier, when the task trigger is active. The power source, radio transceiver, magnetic sensor, and circuit apparatus are enclosed in vehicular sensor node, placed upon pavement and operating for at least five years without replacing the power source components. Magnetic sensor preferably uses the magnetic resistive effect to create magnetic sensor state. Radio transceiver preferably implements version of a wireless communications protocol. The circuit apparatus may further include light emitting structure to visibly communicate during installation and/or testing, and second light emitting structure used to visibly communicate with vehicle operators. Making filled shell and vehicular sensor node from circuit apparatus.
US09767690B2
A system includes a model generating component to generate a prediction tree model based on training data and an input component to receive input data including a destination in a geographical area. A computation component identifies at least one parking venue or at least one parking space near the destination in the geographical area and to generate at least one parking prediction corresponding to the at least one parking venue or the at least one parking space based at least in part on applying the input data to the prediction tree model. A presentation component presents the at least one parking venue or the at least one parking space and to present the at least one parking prediction to a user.
US09767679B2
According to systems and methods for testing alarm initiating devices of a fire alarm system, a control panel of the fire alarm system is placed into test mode. Then, during a walkthrough test, an inspector activates an inspector-activated mechanism of a device. This sends a test mode signal to the control panel, which places the device into a test mode. The inspector or inspector then manually activates the device. The control panel initiates a fire alarm condition in response to a received device signals while the control panel not initiating a fire alarm condition when the device signals are indicative of a fire if the device signals were from alarm initiating devices in the test mode. Alternatively, the control panel places a group of alarm initiating devices into test mode on a rolling basis. As the inspector tests the devices, additional devices are added to the group and previously tested devices are returned to normal operation mode.
US09767672B2
Techniques for locating and identifying mobile devices are described. According to various embodiments, an ambient sound signal may be detected using a microphone of a mobile device. Thereafter, it may be determined that the ambient sound signal corresponds to a predefined user query for assistance in locating the mobile device. For the, a predefined response sound corresponding to the predefined user query may be emitted, using a speaker of the mobile device.
US09767663B2
A GPS directed intrusion system with data acquisition is provided. Some methods can include detecting a threat event associated with a monitored facility, collecting data relevant to the threat event, and transmitting the data relevant to the threat event to a mobile device of an authority figure dispatched to the monitored facility. Some methods can also include placing a surveillance device associated with the monitored facility in a tracking mode, tracking motion captured by the surveillance device, and transmitting data representative of the motion to a mobile device of an authority figure dispatched to the monitored facility.
US09767661B2
An audio surveillance system includes a plurality of nodes and each node includes a microphone, a speaker, and a control unit. The microphone is configured to detect sound and the speaker is configured to provide sound. The control unit is configured to receive a plurality of inputs from the plurality of nodes and the plurality of inputs are based on a detected sound; determine a location of the source of the detected sound based on the plurality of inputs; classify the detected sound according to predefined alert conditions and based on the location of the source of the detected sound; provide an alert to a monitoring device regarding the detected sound based on the classification of the detected sound; and control at least one node from the plurality of nodes to provide an audio response to the detected sound.
US09767646B1
A networked game and method for entry of a non-winning game ticket in a second opportunity random draw game using a computer device that communicates with the game provider, each game player having a unique identifier and a determined balance of chips for selective use during game play shown on a display and at least one control feature selectively operative by the game player to play to an outcome for obtaining additional chips or not, with additional chips awarded to the player upon registering a non-winning ticket of a random draw game in the second opportunity game.
US09767640B2
A system includes a first server and a second server. The second server receives a value from a first device, possibly via the first server, and stores the value. In response to a request from a second device, the second server then determines the value and sends the value to the second device. In this fashion, verification can be made that the first device is in communications with the first server.
US09767631B2
Methods, systems, and devices are described that are directed to status and control of a garage door system via an alarm system controller. A garage door system may include one or more garage doors and at least one sensor configured to sense data indicative of a status of a garage door of the one or more garage doors. The at least one sensor may further be configured to convey the sensed data to an alarm system controller.
US09767630B1
Disclosed are systems and methods for performing entry access over two or more networks. The two or more networks are leveraged to accelerate the entry access and provide redundancy. Performance over each of the two or more networks is tracked in order to allow a mobile device to exchange entry access messaging over the particular network providing fastest start-to-unlock time. The mobile device can alternatively exchange the entry access messaging simultaneously over the two or more networks to create a race condition whereby the fastest start-to-unlock time is obtained without monitoring network performance. Performing the entry access messaging exchange over the two or more networks also ensures reliability in the event a particular network is down or congested, an authorization device on a particular network is down or overloaded, a radio of a mobile device communicating over a particular network is disabled or slow performing.
US09767627B2
Apparatus, systems and methods are disclosed that utilize a vehicle user's input to provide logical context of legitimate vehicle usage through a remote access device to defend the vehicle from theft. As such, an additional level of security is employed and may be used in addition to other security and theft prevention technologies of the vehicle. In one example, a legitimate automobile operator signals the context of the vehicle's state to a hardware security module in the vehicle. The states include, for example, to disallow all diagnostic system access or to allow diagnostic access for servicing.
US09767626B2
A mobile device may authorize with a paired telematics control unit of a vehicle to ensure the vehicle is in a remote service mode; send a command request to the telematics control unit requesting an operation to be automatically performed by a vehicle electronic control unit in place of manual input by an assistant; and receive diagnostic data from the vehicle electronic control unit via the telematics control unit. The telematics control unit may query electronic control units of the vehicle to identify whether the vehicle is in a mode in which commands from a remote service application of a mobile device can be processed; indicate the mode to the application; and receive the command request requesting a service operation to be automatically performed by one of the electronic control units.
US09767624B2
The present invention relates to a device, system and a method for obtaining and monitoring vehicular parameters and in particular, to such a device, system and method in which vehicular parameters are sniffed and automatically ascertained from a vehicle controller data bus.
US09767618B2
A user equipment (UE) includes a memory element and a processor. The memory element is configured to store a plurality of head-related transfer functions. The processor is configured to receive an audio signal. The audio signal includes a plurality of ambisonic signals. The processor is also configured to identify an orientation of the UE based on physical properties of the UE. The processor is also configured to rotate the plurality of ambisonic signals based on the orientation of the UE. The processor is also configured to filter the plurality of ambisonic signals using the plurality of head-related transfer functions to form speaker signals. The processor is also configured to output the speaker signals.
US09767614B2
In accordance with an example aspect, there is provided an apparatus comprising at least one processing core and at least one memory including computer program code, the at least one memory and the computer program code being configured to, with the at least one processing core, cause the apparatus at least to obtain a movement context of a user, rank, based at least in part on the movement contest, at least two objects based on their visibility to the user, and determine, based at least in part on the ranking, at least one of the at least two objects as a placement object for an augmented reality information element.
US09767613B1
The technology disclosed relates to a method of interacting with a virtual object. In particular, it relates to referencing a virtual object in an augmented reality space, identifying a physical location of a device in at least one image of the augmented reality space, generating for display a control coincident with a surface of the device, sensing interactions between at least one control object and the control coincident with the surface of the device, and generating data signaling manipulations of the control coincident with the surface of the device.
US09767606B2
For automatic modification of augmented reality objects, a processor identifies an object of interest displayed by an augmented reality device. The processor identifies an obstruction object that obscures viewing the object of interest within the augmented reality device. The processor further selects one or more of the obstruction object and the object of interest to modify in accordance with a mitigation policy. In addition, the processor modifies the selected object in accordance with the mitigation policy.
US09767605B2
A method, apparatus and computer program product are provided to cause different multi-dimensional representations of an image to be presented upon a display and to facilitate changing from one multi-dimensional representation of the image to another multi-dimensional representation of the image, such as in response to a change in the shape of the display. In the context of a method, a first, multi-dimensional representation of an image is caused to be presented upon the display while the display has a first shape. The method also causes a second, multi-dimensional representation of the image, different than the first, multi-dimensional representation of the image, to be presented upon the display while the display has a second shape, different than the first shape. The method also determines the shape of the display such that the corresponding representation of the image is caused to be presented in response thereto.
US09767604B2
A method of object recognition and/or registration includes receiving a point cloud, arranging the points of the point cloud into a hierarchical search tree, and determining geometric information of the points located within a region, by identifying a highest level tree nodes where all of descendent leaf nodes are contained within the region and selecting the leaf nodes for the points where no sub-tree is entirely contained within the region, such that the points falling within the region are represented by the smallest number of nodes and performing statistical operations on the nodes representing the points in the region. The geometric information includes descriptors of features in the point cloud. The method further includes comparing the feature descriptors with a database of feature descriptors for a plurality of objects.
US09767603B2
In order to process 3D input image data for a display of images on at least one display unit, the 3D input image data are provided scene-by-scene in accordance with an associated 3D image scene. The 3D input image data are each fed to a scene processing unit for management and processing. The 3D input image data are processed scene-by-scene in the scene processing unit, wherein at least two 3D image scenes are at least partially superposed and a whole 3D scene is formed and managed. Several 3D output scenes are derived from the whole 3D scene, for which 3D output scenes the superposition occurs in accordance with different perspective locations of observation and 3D output image data are produced in the process. The 3D output image data are fed to at least one rendering unit, which is associated with the display unit, for the production of target image data adapted to the display unit.
US09767602B2
Various embodiments are generally directed to techniques for reducing processing demands of shading primitives in rendering a 2D screen image from a 3D model. A device includes a clipping component to clip a visible primitive of a 2D screen image derived from of a 3D model within a first area of the screen image covered by a shading pixel to form a polygon representing an intersection of the first area and the visible primitive; a first interpolation component to interpolate at least one attribute of vertices of the visible primitive to each vertex of the polygon; and a second interpolation component to interpolate color values of the vertices of the polygon to a point within a second area covered by a screen pixel of the screen image, the second area smaller than the first area and at least partly coinciding with the first area. Other embodiments are described and claimed.
US09767595B2
A tile-based graphics processing pipeline 1 comprising a rasteriser 3, a renderer 6, a tile buffer 10, a write out stage 13 and a programmable processing stage 14. The tile buffer 10 stores multiple render targets for a deferred shading operation and the programmable processing stage 14 is operable to, under the control of graphics program instructions, read data from two or more of a set of multiple render targets for a deferred shading operation stored in the tile buffer 10, perform a deferred shading processing operation using the read data, and to write the result of the processing operation to an output render target in the tile buffer 10, or to external memory.
US09767590B2
The present techniques relate to transforming a multi-frame asset, such as a time-lapse video or panoramic view, into a single image. The technique generally involves displaying a frame from the multi-frame asset on a display, and compressing the multi-frame assent into a single image based on a relation of pixel locations on the display to a path disposed on the display.
US09767589B1
In one aspect, a computer-implemented method is disclosed for providing geographic imagery. The method may include receiving, at a computing device, a request for a geographic image, wherein the geographic image depicts at least a portion of a selected location within a geographic area. In addition, the method may include presenting, with the computing device, the geographic image and superimposing a map including normalized travel way data associated with the geographic area over at least a portion of the geographic image.
US09767588B2
A method for image processing is provided comprising: detecting a rectangular image region (RIR) in one of a plurality of images while the plurality of images is being received; obtaining a coordinate corresponding to the detected RIR; and storing in a memory the coordinate and a link associating the coordinate with the image in which the RIR is detected.
US09767583B2
A method and apparatus are provided for packing a plurality of images. A number of cells of a canvas on which the plurality of images having different aspect ratios are to be packed is determined. The cells on the canvas are merged such that a number of the plurality of images is equal to the number of the cells. Each of the plurality of images are placed in a corresponding one of the plurality of cells of the canvas, according to respective aspect ratios of the plurality of images, when the number of the plurality of images is equal to the number of the cells.
US09767579B2
An information processing apparatus includes a memory, an accepting unit, a determining unit, and a selecting unit. The memory stores a template collection. The memory associatively stores, for each template, the template and a degree of first impression similarity indicating an impression of the template. The accepting unit accepts an image. The determining unit determines an impression of the accepted image. The selecting unit selects, from the template collection, a template that is in harmony with the image by using a degree of second impression similarity indicating the impression of the image, and the degree of first impression similarity.
US09767577B2
The described technology regards an augmented reality system and method for estimating a position of a location of interest relative to the position and orientation of a display based upon a retroactive adjustment of a previously rendered position and orientation of the display, by means of an adjust-update-predict (AUP) cycle, and calculating the location of interest relative to the position and orientation of the display. Systems of the described technology include including a plurality of sensors, a processing module or other computation means, and a database. Methods of the described technology use data from the sensor package useful to accurately render graphical user interface information on a display.
US09767564B2
A method, computer program product, and computer system to determine viewing patterns of persons captured by image or video is provided. A processor retrieves one of more video feeds, wherein the one or more video feeds capture one or more people. A processor determines a viewing area for at least one person of the one or more people, wherein the viewing area is based, at least in part, on a position and viewing direction of the at least one person. A processor determines a viewed object for the at least one person of the one or more people based, at least in part, on one or more objects in an area covered by the viewing area for the at least one person of the one or more people. A processor generates a report including (i) the viewed object and (ii) the at least one person.
US09767555B2
Methods and apparatus associated with distinguishing invasive adenocarcinoma (IA) from in situ adenocarcinoma (AIS) are described. One example apparatus includes a set of logics, and a data store that stores three dimensional (3D) radiological images of tissue demonstrating IA or AIS. The set of logics includes a classification logic that generates an invasiveness classification for a diagnostic 3D radiological image, a training logic that trains the classification logic to identify a texture feature associated with IA, an image acquisition logic that acquires a diagnostic 3D radiological image of a region of tissue demonstrating cancerous pathology and that provides the diagnostic 3D radiological image to the classification logic, and a prediction logic that generates an invasiveness score based on the diagnostic 3D radiological image and the invasiveness classification. The training logic trains the classification logic using a set of 3D histological reconstructions combined with the set of 3D radiological images.
US09767554B2
Various aspects of a method and system for detection of surgical gauze during anatomical surgery are disclosed herein. In accordance with an embodiment of the disclosure, the method is implementable in an image-processing engine, which is communicatively coupled to an image-capturing device that captures one or more video frames. The method includes the determination of a set of pixel characteristics based on color filtering of at least a portion of a video frame. Thereafter, one or more blocks of pixels of a portion of a surgical gauze are detected in the video frame based on the set of pixel characteristics. Further, additional pixels that correspond to a remaining portion of the surgical gauze are identified based on a plurality of metrics. The surgical gauze is recognized in the video frame based on the detection of the one or more blocks of pixels and the identification of the additional pixels.
US09767543B2
A user equipment (UE) includes a receiver and a processor. The receiver is configured to receive a standard dynamic range (SDR) image and metadata related to an HDR image. The processor is configured to identify relevant portions of the SDR image to be enhanced based on the metadata related to the HDR image. The processor is also configured to increase an intensity of the relevant portions of the SDR image to create an enhanced SDR image. The processor is also configured to output the enhanced SDR image to a display.
US09767542B2
The invention relates to a method for selecting an image dynamic range conversion operator from among a set of image dynamic range conversion operators by optimizing a quality criterion, each image dynamic range conversion operator being applied to an original image to obtain an image, called the modified image, whose dynamic range is lower than that of the original image, wherein said quality criterion is calculated, for each image dynamic range conversion operator, as a function of a distortion calculated from a reconstructed version after coding and decoding the original image modified by said image dynamic range conversion operator.
US09767537B1
An inspection system that includes a memory; a configurable acquisition channel; a controller that is adapted to: (a) determine, in response to a first frequency wise relationship between the first noise power spectrum and the first signal power spectrum, a first configuration of the configurable acquisition channel; and (b) determine, in response to a second frequency wise relationship between the second noise power spectrum and the second signal power spectrum, a second configuration of the configurable acquisition channel; and wherein the configurable acquisition channel is adapted to: (a) acquire the image of the first area of the inspected object while being configured according to the first area configuration, and (b) acquire the image of the second area while being configured according to the second area configuration.
US09767530B2
An image forming apparatus as an image displaying apparatus displays a preview image of the first page at a first resolution. The image forming apparatus enlarges and displays the preview image of the first page when receiving an operation to enlarge the preview image of the first page. The image forming apparatus stores a history of the resolution of the preview image being enlarged of the first page. The image forming apparatus determines a second resolution based on the history of the resolution, when receiving an operation to display a preview image of the second page. The image forming apparatus generates the preview image of the second page at the second resolution.
US09767529B1
A method for storing data of an image frame into a frame buffer includes at least the following steps: dividing the image frame into a plurality of access units, each having at least one encoding unit, wherein each encoding unit is a unit for data compression; and performing the data compression upon each encoding unit of the image frame, and generating an output bitstream to the frame buffer based on a data compression result of the encoding unit. A processing result of each access unit includes each output bitstream of the at least one encoding unit included in the access unit; a plurality of processing results of the access units are stored in a plurality of storage spaces allocated in the frame buffer, respectively; and a size of each of the storage spaces is equal to a size of a corresponding access unit.
US09767522B2
Systems and methods for monitoring and tracking usage of a lamp and, in one example, assigning a monetary value that can be billed to an end user are provided. Examples of the lamps can communicate wirelessly in order to receive and to transmit information related to initialization, authorization, electrical power consumption monitoring, and combinations thereof. In one embodiment, the lamp transmits data a usage parameter to a service provider via a network. The service provider can aggregate the data and, in one example, assign a usage fee that describes a monetary value based on the usage parameter and generate an output that includes that usage fee.
US09767512B2
An apparatus for validating entitlement capabilities, and determining, based on the entitlement capabilities, whether an account request associated with the entitlement capabilities qualifies for Straight Through Processing is provided. The apparatus may include a receiver. The receiver may receive entitlement authorization for a signatory and a client request to open an account. The apparatus may also include memory configured to: store, in a centralized repository, entitlement capabilities for the authorized signatory. The centralized repository may provide access to one or more signature documents associated with the authorized signatory. The centralized repository may link the signatory to one or more signature documents associated with the signatory's authorization. The apparatus may also include a display configured to display a hierarchal map of the one or more authorized signatories. The hierarchal map illustrates lines of authority from the authorized signatories to each of their respective authorizers.
US09767511B2
A system, method, and computer program product for automating an online auction service and bidder interacton including receiving a keyword searching based on the keyword product auctions of a plurality of auction sites; and may include using a search agent or a meta-search agent, and providing returned auctions, and may include presenting current status of product auctions. The method can monitor temporal progression of auctions, and can notify users of changes in status. A bid proxy can be activated as an auction nears completion placing bids until the auction is won or lost. In the event of a counter offer, a higher bid can be made.
US09767505B1
Techniques are disclosed to provide an item recommendation service in an electronic marketplace. Recommendations may be provided to a user of an electronic marketplace to offer an item via the electronic marketplace based on identifying requests for items from other users. In at least one embodiment, the request for an item from the other users may be identified as an item other than a plurality of items offered by the electronic marketplace or by the user. One or more sellers who offer items similar to the requested item may be identified based on a category of the requested item. A recommendation may be provided to an identified seller to offer the requested item via the electronic marketplace.
US09767494B2
Organizing data in a cloud computing environment having a plurality of computing nodes is described. An authorization to service a request is received. The request may be from a user for launching an instance. In response to receiving the authorization and based on the request, an image list is determined. The image list includes information corresponding to a plurality of machine images. At least one machine image is identified from the image list associated with a functional requirement of the request. The instance is launched at the at least one computing node. The at least one machine image is updated after the instance has been launched.
US09767492B2
The present disclosure discloses a method and an apparatus for ranking and searching based on interpersonal distances. The method includes: obtaining, by a ranking server, objects queried by a query request based on the request initiated from a user client and obtaining reference user groups corresponding to the queried objects; obtaining, by a ranking server, an interpersonal distance between each user in the reference user groups and a user who initiates the query request, and obtaining rating scores of the objects queried by the request that are given by each user in respective reference user groups; determining, by a ranking server, user relationship ranking indices of the objects based on the interpersonal distances and the rating scores, and ordering the objects based on the user relationship ranking indices of the objects. Compared with the existing technologies, the example ranking server performs ranking based on interpersonal distances between a user and reference users as well as rating scores associated with the reference users, quantifies a reference value of choices associated with a social network of the user with respect to shopping choices of the user, and provides a ranking method that is based on characteristics of the user.
US09767489B1
When a content item is initially served to a client device, the content item may result in an impression effect. As time elapses, the initial impression may fade. Such a decay of the impression effect may be predicted through the use of a predictive model. In some implementations, one or more impression effect parameters may be accessed and used with the predictive model to determine a decay factor or predicted value that incorporates the impression effect decay for a content item. A value, such as a score, may be determined based on the decay factor or the predicted value and a bid associated with a content item. A content item may be selected based on the determined value and data to effect presentation of the content item may be provided.
US09767480B1
Systems and methods are provided for discovering advertisements on publisher web pages and for identifying placement pathways by which discovered advertisements have been placed on the publisher web pages. An advertisement tracking and discovery system may use multiple web crawler applications to explore multiple publisher websites. The web crawler applications may gather advertisement data that includes times associated with each request made by the web crawler application. The system may use the gathered advertisement data and the times associated with each request to determine the placement pathways by which discovered advertisements have been placed. Each placement pathway may include one or more advertising channels or combinations of advertising channels. The system may accumulate and aggregate advertising data associated with the advertisements and the placement pathways and display the aggregated advertising data to a customer.
US09767478B2
A system determines an extent to which advertisements are presented or updated within a document, a quality of an advertiser associated with an advertisement provided within the document, whether an advertisement in the document relates to an advertising document that has more than a threshold amount of traffic, and/or an extent to which an advertisement provided within the document generates user traffic to an advertising document related to the advertisement. The system generates a score for the document based, at least in part, on the extent to which advertisements are presented or updated, the quality of the advertiser associated with the advertisement, whether the advertisement relates to an advertising document that has more than the threshold amount of traffic, and/or the extent to which the advertisement generates user traffic to the advertising document. The system ranks the document with regard to at least one other document based on the score.
US09767473B2
A structure and method includes a detector to determine that a caller is waiting for service. A presentation module presents an advertisement to the waiting caller, wherein a compensation is paid to have the advertisement presented to the waiting caller.
US09767465B2
Methods and Systems for facilitating caching of advertisements are described. The methods include receiving an ad request and generating a serving plan in response to said receiving the ad request. The serving plan includes multiple cache lines that identify corresponding advertisements. Each of the cache lines is associated with a corresponding expiration. Also, each cache line is readable by logic to display one of the advertisements corresponding to the cache line. The cache lines include a first cache line. The first cache line includes ad information, which is associated with a first one of the advertisements. Moreover, the ad information includes one or more parameters for expiration of the first cache line of a client device. The client device is configured to display the plurality of advertisements. The method includes sending the serving plan to the client device to store in the client device.
US09767463B2
In at least one aspect, methods and corresponding systems are provided herewith for mixing media and advertising content on demand. The systems preferably include at least one computing device coupled over a communication network to a plurality of other devices. The at least one computing device is preferably operable at least to: receive a request for media content from a user of a device, retrieve a media file associated with the media content requested and product placement data, and mix the media file with product placement data such that the product placement appears in the media content disposed in at least a portion of a defined null space within the media file.
US09767447B2
A computer-implemented method for providing a product to a user includes determining that an item obtained by a mobile computing device corresponding to the user is indicative of an oversized item. A first notification is generated indicating the oversized item and retrieval information related to the oversized item. The first notification is transmitted to a first facility computing device corresponding to a first facility attendant. When the user completes a transaction for the purchase of the oversized product at one of the point of sale terminal, terminal information related to the point of sale terminal is obtained. A second notification is generated related to the terminal information. The second notification is transmitted to a second facility computing device corresponding to a second facility attendant.
US09767442B2
Systems and methods for person-to-person and person-to-merchant remittances from a person having a closed loop system account to merchants who are not members of the closed loop system. In an embodiment, a payment gateway computer receives a remittance transaction request from a payment services provider (PSP) computer associated with a closed-loop system, maps an alias identifier into a shadow account number assigned to the sender in an open-loop payment authorization system, determines that the alias identifier mapped into a valid shadow account number, debits a stored value account for the remittance transaction amount, credits a shadow account in the open-loop payment authorization system for the remittance transaction amount, generates an authorization request for an open-loop payment transaction and transmits it to the open-loop payment authorization system, receives an authorization response from the open-loop payment authorization system, and transmits an approval response.
US09767441B2
Systems and methods are provided for monitoring one or more lift devices, such as elevators and escalators. A server obtains code events about a lift device controller via a web services application. The code events are in a first format. The server reformats the code events into a second format using a mapping table, outputting reformatted code events. The server populates a graphical user interface (GUI) with the reformatted code events. The GUI is accessible by another computing device over the Internet.
US09767440B2
A system and method for student attendance management are disclosed. A particular embodiment includes: installing a site-resident data collection module in a site location; using the site-resident data collection module to collect student information, attendance data, and other site data from the site location; transferring the site data to a host location; performing data transformation and normalization operations on the site data to convert the site data to a common format, the data transformation and normalization operations including district-specific data transformation rules; performing district configuration operations to configure rules specifying how and when alerts can be sent to recipients based on the site data; and performing scheduling and reporting operations to generate and distribute alerts, including attendance letters, to recipients based on the site data and the configured rules.
US09767438B2
The system provides a method and process for displaying and sorting messages in a communication system. The system allows multiple folders of messages to be opened simultaneously. The system also displays sent and received messages in the same display when desired. The system includes automatic and/or custom color coding of messages for ease of identification of message types, sent or received messages, root sender, cc messages, responsive messages, etc. The system also includes a unique navigation system to allow the user to more easily move through related messages, threads, and folders. The navigation system can be used in situations where the prior art would have required a search to be executed.
US09767437B2
Disclosed is a method of matching job seekers with job providers. The method may include receiving a plurality of job seeker values and a plurality of job provider values corresponding to at least one attribute. The method may further include receiving a job seeker priority associated with a job seeker value. Furthermore, the method may include receiving a job provider priority associated with a job provider value. Subsequently, matching between job seekers and job providers may be performed based on comparison between job seeker values and job provider values. Additionally, the matching may be based on a comparison of job provider priority and job seeker priority.
US09767435B1
A facility for collecting distinguished information relating to an engagement of a first organization by a second organization is described. The facility provides an interface usable by at least one user affiliated with the second organization to provide the distinguished information. Only after the interface is used by a user affiliated with the second organization to provide the distinguished information, the facility permits at least one user affiliated with the second organization to perform a distinguished process.
US09767432B1
An inventory management system is described. The inventory management system may be configured to use thermal image data to determine that an item was successfully placed in a storage structure. As part of this process, thermal images may be processed to identify instances of temperature differences that correspond to the item. These temperature differences may be evidence of a recent touch by an operator or may be generated by temperature changing devices during item placement.
US09767421B2
Determining a True Value Index™ (TVI™) for a petroleum production capital project provides a novel indicator and metric that is designed to quickly assess the economics of undertaking the petroleum production capital project. The TVI™ can be determined according to the following equation: TVI=NPV+(β*Reserves) where, NPV=Net present value of a project; β=Reservoir Management Factor (RMF™)=absolute value (sum of Coefficient of Reserves and Coefficient of Production) derived from multivariable correlation=to reflect the market value premium on increased reserves if the producer was public; and Reserves=Barrels of proven reserves to be created by the project.
US09767417B1
Techniques for providing category predictions may be provided. For example, a process may attempt to improve a user experience when the user provides a search query. The process can predict the category associated with the search query, even when the category is not a keyword in the search query. Once the category is determined, data may be provided for the particular category, including data that enables an adjustment of a user experience. For example, when the category is apparel, the user experience may include an image-heavy layout and, when the category is books, the user experience may provide more text.
US09767405B2
A radio frequency identification (“RFID”) antenna structure such as may be found on a tag, label or inlay for use with consumer products that has a conductive surface. The RFID structure of the present invention can be attached to the conductive surface without significantly modifying the performance of the RFID device. The RFID device has first and second portions, with the first portion having a first antenna pattern and the second portion including an elongate section for attachment to the consumer item.
US09767398B2
An information processing apparatus includes a receiving unit configured to receive output object information on an object to be output; a storage unit configured to store therein output device information on different types of output devices; and a determining unit configured to determine an output device based on the output object information and the output device information.
US09767396B2
A method of selecting optimal inks from a plurality of ink candidates for a given color is provided, said method including a) obtaining a measure of spectral reflectance of a print substrate; b) obtaining a measure of the spectral reflectance of a first candidate ink of a first color; c) predicting a color gamut for the first candidate ink based on the spectral reflectance of the ink and the spectral reflectance of the substrate; d) repeating steps b) and c) for a second ink candidate of the first color; e) selecting the ink candidate for which the predicted color gamut includes the most target spot colors as the optimal ink for the first color.
US09767377B2
A pattern extracting device, an image projecting device, a pattern extracting method, and a program capable of extracting all the feature points by interpolating defective feature points even when there are defective feature points of an image pattern. The pattern extracting device extracts feature points to be interpolated based on a captured image of a projected image pattern, and interpolates the feature point to be interpolated by using near-by feature points that are located near the feature point, divides the near-by feature points into groups, calculates extrapolation coordinates of the groups, and calculates coordinates of the feature point to be interpolated in view of significance of the extrapolation.
US09767375B2
A delivery processing apparatus has a recognition unit and a determination unit. The recognition unit executes recognition processing for recognizing information that is provided on a delivery target item based on an image obtained by shooting an image of the delivery target item. The determination unit determines whether or not to extend the recognition processing performed by the recognition unit, based on a degree of progress of the recognition processing that has been performed by the recognition unit in a period from when the information recognition processing was started by the recognition unit until a predetermined time has elapsed, and an extension rate, which indicates a ratio of the number of times that the recognition unit has extended the recognition processing to the number of times that the recognition unit has performed the recognition processing.
US09767368B2
A method and a system computationally performs scene analysis of semantic traffic spaces based on an adaptive spatio-temporal ray-based approach. The method includes acquiring a spatial semantic environment map including semantic context data, calculating at least one feature for at least one location on the spatial environment map taking into account the semantic context of the location and determining a category for the at least one location based on the at least one calculated feature. A feature is a ray based feature calculated by integrating input values along at least one ray extending in least one of a space dimension and a time dimension. The ray may have a ray shape corresponding to a general shape of a road and/or the at least one spatially extending ray follows a course of the road and/or is perpendicular to a surrounding road segment orientation.
US09767367B2
An object estimation apparatus estimates a position and a speed of an object in images based on the images taken by an image taking means from different positions. The object estimation apparatus includes a shift information taking means that takes temporal shift information of a position of a corresponding pixel from frames arranged in time series in a reference image, which is a reference between the images, a parallax information taking means that takes parallax information of each corresponding pixel from the images with reference to the reference image, an estimated value taking means that estimates estimated values of the position and the speed of the object in three-dimensional space by using a filter based on the shift information taken by the shift information taking means and the parallax information taken by the parallax information taking means, a determination means that determines whether or not each of the shift information taken by the shift information taking means and the parallax information taken by the parallax information taking means is an abnormal value, and a correction means that corrects the estimated value taken by the estimated value taking means based on a determination result of the determination means. The correction means corrects the estimated value taken by the estimated value taking means by using different methods between a case where the determination means determines that the shift information taken by the shift information taking means is an abnormal value and a case where the determination means determines that the parallax information taken by the parallax information taking means is an abnormal value.
US09767360B2
An image processing method and an electronic device implementing the method are provided. The method includes the electronic device sequentially receiving an image captured by a camera and determining whether a frame of the received image satisfies a predetermined condition. If the predetermined condition is satisfied, the electronic device recognizes an object in the frame. Then the electronic device tracks the object in the frame through tracking data created based on a feature extracted from the recognized object.
US09767356B2
A system including an interface for receiving inspection image data of an inspection image of an inspection object. The inspection image data includes information of an analyzed pixel of the inspected image and of reference pixels of the inspected image. The system further includes a memory and a processor device operatively coupled to the interface and the memory to obtain an inspected value representative of the analyzed pixel of the inspected image, and a reference value for each of the reference pixels of the inspected image. For each reference pixel, the processor devices calculates a difference between the reference value of a respective reference pixel and the inspected value of the analyzed pixel, computes a representative difference value based on the differences and determines a presence of a defect in the analyzed pixel based on the representative difference value.
US09767340B2
This document relates to systems and method for latent fingerprint detection using specular reflection (glare). An exemplary system may include a light source alignment portion configured to align a light source at an illumination angle relative to a sample surface such that the light source illuminates a sample surface so that the surface produces specular reflection. The system may also include a specular reflection discriminator that directs the produced specular reflection to an optical detector aligned relative to said sample surface at an alignment angle that is substantially equal to an angle of reflection of the produced specular reflection. Preferably, the directed specular reflection does not saturate the optical detector; and the optical detector captures the specular reflection from the sample surface and generates image data using essentially only the specular reflection.
US09767338B2
A method for operating of an electronic device is provided. The method includes: sensing an input on an input device, detecting one axis direction of a fingerprint input or to be input to a fingerprint sensor, based on the sensed input, determining whether the one axis direction of the fingerprint is consistent with a reference direction of a reference fingerprint, when the one axis direction is not consistent with the reference direction, making the one axis direction consistent with the reference direction, and determining whether the fingerprint is consistent with the reference fingerprint.
US09767336B2
Methods, computer program products and systems for providing video tracking. The method includes receiving a first signal from a radio frequency identification (RFID) tag. A location of the RFID tag is determined in response to the first signal. An image that includes the location of the RFID tag is recorded. The location of the RFID tag is marked on the image, resulting in a marked image.
US09767321B1
Systems and methods are disclosed for allowing security features to be selectively enabled during device configuration. For example, a programmable integrated circuit device is provided that receives configuration data and security requirement data. Control circuitry compares enabled security features in the device against the security requirements, and can configure the programmable integrated circuit device with the configuration data or prevent such configuration. Control circuitry may also use the security requirement data to set security features within the device.
US09767316B1
Methods and systems for scrubbing confidential insurance account information are provided. According to embodiments, a scrubbing server can receive a request to scrub confidential insurance data that includes the contents of an insurance account information database and an indication of the category of confidential data stored in the database. The scrubbing server can scrub the valid data contained in the received database, replacing confidential information with “scrambled” data that is not confidential. The scrubbing server can transmit the contents of the scrubbed database back to the requesting party.
US09767314B2
A system and method for hosting a social network that enables entities to particularly manage the privacy level of content posted on the social network. This may enable an entity to distribute news, congratulations, accolades, invitations, and/or other internal information within the social network to members, employees, students, investors, and/or other parties.
US09767305B2
Systems, methods, and non-transitory computer-readable media can detect a set of images locally stored on a computing system. The computing system can be associated with a first user. One or more facial recognition processes can be applied to the set of images. It can be determined, based on the one or more facial recognition processes, that a subset of images, out of the set of images, is associated with a second user. One or more options for the first user to share the subset of images with the second user can be provided.
US09767302B2
Activity data is analyzed or evaluated to detect behavioral patterns and anomalies. When a particular pattern or anomaly is detected, a system may send a notification or perform a particular task. This activity data may be collected in an information management system, which may be policy based. Notification may be by way e-mail, report, pop-up message, or system message. Some tasks to perform upon detection may include implementing a policy in the information management system, disallowing a user from connecting to the system, and restricting a user from being allowed to perform certain actions. To detect a pattern, activity data may be compared to a previously defined or generated activity profile.
US09767297B2
A computer system with multiple security levels, the system comprising a high-power processing device (130), a low-power processing device (110), and an interface unit (120) comprising functions for moving classified information between the high-power device (130) and the low-power device (110) according to formal rules for confidentiality and/or integrity. Additional security aspects, e.g. availability, may readily be accommodated. A method for implementing multiple levels of security along a number of independent security axes on the system is also disclosed.
US09767296B2
A method for requesting access rights for an object of a computerized system, comprising invoking in a remote computer linkable to the computerized system an add-on program configured for notifying an owner of the object of the computerized system according to received contact data of the owner of the object, thereby requesting from the owner of the object access rights to the object independently of the computerized system, and an apparatus for performing the same.
US09767293B2
At least one hardware security module out of a plurality of hardware security modules is assigned to a guest system. The at least one hardware security module out of the plurality of hardware security modules is configured with a master key. A data pattern is used for a challenge protocol adapted to prove that the at least one hardware security module out of the plurality of hardware security modules is configured with the master key. The at least one hardware security module including the master key is assigned to the guest system based on a positive outcome of the challenge protocol.
US09767292B2
Using various embodiments, methods and systems for computing a self-assembling indirect control flow graph based on one or more function types and function pointer types are described. In one embodiment the indirect control flow graph is computed by finding one or more function types and function pointer types in source code and/or binary code, computing one or more identifier tags for each type, classifying functions and function pointers based on the computed tags. In one embodiment, the classification tags can be used in a tag check based Control Flow Integrity system. In another embodiment, the classification tags can be used to convert indirect function calls into direct function calls. Yet in another embodiment, tag checks can be eliminated in a Control Flow Integrity system.
US09767291B2
Provided herein are systems and methods for monitoring and assessing the security and risk presented by applications deployed in a complex computing environment. An exemplary application security system includes a server having a processing device in communication with storage systems, computing devices executing application instances configured to receive and transmit information over a network, and a security testing system including a first test module that is associated with a first application, which is associated with one or more of the application instances. The processing device of the server retrieves information about the first application, including current dependency information of the first application, calculates a security risk score for the first application based on the information, determines a security priority level associated with first application, and associates the security priority level of the first application with the first application in a database of application security information.
US09767286B2
An electronic module that includes means for determining an operating system targeted by a message received by a transmitter-receiver of an electronic device, from among at least a Rich-OS operating system and a trusted operating system executed on a chipset of the electronic device, so that the message becomes accessible to the targeted operating system. The determining means may be set in operation in response to receipt of the message by the transmitter-receiver.
US09767285B2
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for categorizing a process using crowdsourcing are described. The methods include the action of receiving data indicating resources allocated upon execution of each of one or more processes. The methods further include the action of receiving data indicating a configuration of the client device. The methods further include receiving data indicating a user selection whether to execute each of the one or more processes. The methods further include the action of determining a risk score that reflects a likelihood that the process is a malicious process. The methods further include the action of identifying a particular process. The methods further include the action of performing additional processing on the particular process. The methods further include the action of determining an updated risk score for the particular process.
US09767274B2
Approaches for providing a guest operating system to a virtual machine. A read-only copy of one or more disk volumes, including a boot volume, is created. A copy of a master boot record (MBR) for the one or more disk volumes is also stored. The read-only copy may be, but need not be, made using a Volume Shadow Copy Service (VSS). A virtual disk, for use by the virtual machine, is created based on the read-only copy of the one or more disk volumes and the copy of the master boot record (MBR), wherein the virtual disk comprises the guest operating system used by the virtual machine. In this way, a single installed operating system may provide both the host operating system and the guest operating system.
US09767272B2
In one embodiment, a processor comprises: a first register to store a first bound value for a stack to be stored in a memory; a second register to store a second bound value for the stack; a checker logic to determine, prior to an exit point at a conclusion of a function to be executed on the processor, whether a value of a stack pointer is within a range between the first bound value and the second bound value; and a logic to prevent a return to a caller of the function if the stack pointer value is not within the range. Other embodiments are described and claimed.
US09767260B2
In various example embodiments, a system and method for managing supplemental content relating to a digital good are presented. The supplemental content relating to the digital good may be received, where the supplemental content may be for presentation to a consumer. The supplemental content may be stored in accompaniment with the digital good. Ownership criteria associated with ownership rights of the supplemental content may be determined. The ownership rights corresponding to the supplemental content may be transferred from a first entity to a second entity based, at least in part, on the determined ownership criteria. The second entity may be authorized to access the supplemental content based, at least in part, on the determined ownership criteria. The supplemental content may be caused to be distributed to the second entity.
US09767252B2
A computer-readable recording medium stores a rendering program that causes a computer to execute process that includes acquiring an internal organ model that is a set of elements having physical values according each position of an internal organ; setting a plurality of planes that form given angles with a line of sight from a viewpoint position, and intersect the internal organ model; assigning among the set of elements, a physical value of an element intersected by a plane set at the setting, to an element cross section that is a plane where the plane set at the setting intersects the element; and rendering, based on the physical value, the element cross section to which the physical value has been assigned.
US09767250B2
A computer-implemented method for designing a biological model provides a set of biological models, each biological model comprising a plurality of elements and interactions between elements. Next the method provides groups of elements identified as identical, each element having an associated biological model. The method moves an element from a first group to a second group in order to correct the grouping of the elements; updates both groups; and creates a combined model by combining the set of biological models according to the updated groups.
US09767249B1
An automation system including a plurality of peripheral devices, each configured to perform at least one function relating to energy consumption in a facility and an automation controller in communication with the plurality of peripheral devices and providing for the control of the performance of the function by each device. An external network resource such as at least a virtual private network server is configured to enable communication with the automation controller. The automation controller is configured, such as by executing virtual private network software, to establish and maintain a secure data link with the virtual private network server and to enable oversight and/or control of the automation controller via the virtual private network server.
US09767246B2
A system and method for compensating signal delay across a solid state photomultiplier. The method including determining respective arrival times of signals from a plurality of microcells of the photomultiplier, calculating a signal transit time delay difference between the respective arrival times for individual signals, correlating the individual transit time delay differences to an amount of respective signal propagation compensation for respective microcells of the photomultiplier, and introducing the respective signal propagation compensation into circuitry of the respective microcells. The method also includes at least one of adjusting a response shape of a photodiode within each of the plurality of microcells, adjusting operating parameters of a one-shot pulse circuit within the microcells, and modifying circuit design values of each microcells during fabrication of the photomultiplier. A non-transitory computer readable medium and a system for implementing the method on a row, column, and/or individual microcell level are disclosed.
US09767243B2
A system and method of layout design for an integrated circuit and integrated circuit, the method includes positioning all conductive traces of a first mask pattern, in a first direction, wherein the conductive traces of the first mask pattern are in a first conductive layer. The method also includes positioning all conductive traces of a second mask pattern, in the first direction, wherein the conductive traces of the second mask pattern are in the first conductive layer, and the second mask pattern is offset from the first mask pattern in a second direction different from the first direction.
US09767239B1
System and methods for achieving a timing closure in a design of an integrated circuit in presence of manufacturing variation. The method includes running a timing engine of a statistical timing analysis tool performing at least one optimization to fix at least one violation of at least one timing quantity at an integrated circuit location. The method includes choosing at least one optimization to apply and finding at least one failing timing quantity, where the quantity is failing due to at least one source of variability which the optimization would impact. The optimization is applied to at least one section of the path leading to the failing timing quantity, where the section contributes to the source of variability. Statistical sensitivity information in canonical form guides the optimization by providing a fully parameterized canonical form of the identified timing violations.
US09767233B2
Embodiments of the invention provide systems and methods for nesting objects in 2D sheets and 3D volumes. In one embodiment, a nesting application simplifies the shapes of parts and performs a rigid body simulation of the parts dropping into a 2D sheet or 3D volume. In the rigid body simulation, parts begin from random initial positions on one or more sides and drop under the force of gravity into the 2D sheet or 3D volume until coming into contact with another part, a boundary, or the origin of the gravity. The parts may be dropped according to a particular order, such as alternating large and small parts. Further, the simulation may be translation- and/or position-only, meaning the parts do not rotate and/or do not have momentum, respectively. Tighter packing may be achieved by incorporating user inputs and simulating jittering of the parts using random forces.
US09767228B2
Methods, devices, and computer-readable media for determining a deployment of an access control system are described herein. One method includes extracting a plurality of two-dimensional spaces from a building information model of a facility, determining a plurality of connections between the plurality of spaces, defining a zone of the facility, wherein the zone includes a subset of the plurality of spaces and a subset of the plurality of connections between the spaces, and associating an access reader with a particular connection of the subset of the plurality of connections located on a boundary of the zone.
US09767224B2
Systems and methods are provided for designing and fabricating contact-free support structures for overhang geometries of parts fabricated using electron beam additive manufacturing. One or more layers of un-melted metallic powder are disposed in an elongate gap between an upper horizontal surface of the support structure and a lower surface of the overhang geometry. The powder conducts heat from the overhang geometry to the support structure. The support structure acts as a heat sink to enhance heat transfer and reduce the temperature and severe thermal gradients due to poor thermal conductivity of metallic powders underneath the overhang. Because the support structure is not connected to the part, the support structure can be removed freely without any post-processing step.
US09767216B2
A method and system are provided for capturing and applying changes to a data structure made by one or more processing nodes. The method includes providing a data structure including one or more elements (200-205), maintaining a linked record of changes (200a-200c, 201a-201c, 205a-205b) to each element (200-205) made by a processing node. A new value of an element (200-205) is linked to the previous value. A record (250) of the sequence of changes to the elements (200-205) is also maintained. In one embodiment, the linked record of changes (200a-200c, 201a-201c, 205a-205b) is a push down stack. The data structure is defined including indirections (210-215) pointing to most recent values of an element (200-205), which in turn points to the previous value of the element (200-205), forming a linked record to the initial value of the element.
US09767203B2
A search context is recorded during a search performed by a first user. The search context may include environmental variables associated with the computing equipment used by the first user such as at least one of regional settings, geographic location, social attributes, job role, browse history, and cookie files. The search context may be encrypted or be restricted for use by certain users and for a specific period of time. The search context may be sent to a second user or a group. The context is applied to environmental variables associated with the computing equipment used by the second user. The second user can thereby substantially duplicate the search performed by the first user.
US09767191B2
Embodiments relate to retrieving a document from a plurality of document groups in which mutually related documents are each included. An aspect includes acquiring a retrieval condition that includes a plurality of conditions and at least one logical operator that connects the plurality of conditions. Another aspect includes identifying, with respect to each condition of the plurality of conditions, a document group including a document satisfying the condition from among the plurality of document groups. Another aspect includes identifying a document that satisfies at least one condition. Another aspect includes determining a document that is a retrieval result by making a selection to omit or retain that depends on the at least one logical operator. Another aspect includes generating information showing the document that is the retrieval result based on the retrieval condition.
US09767187B2
Systems, methods, and computer-readable storage media that may be used to generate recommendations based on organic search term analysis are provided. One method includes determining conversion path data for a content provider. The method further includes determining a plurality of organic search keywords within the conversion path data. The method further includes analyzing the plurality of organic search keywords within the conversion path data to generate an analysis metric for each of the plurality of organic search keywords. The method further includes selecting one or more of the plurality of organic search keywords based on the analysis metrics for the organic search keywords, and generating one or more recommendations for new content to be published by the content provider based on the selected one or more organic search keywords.
US09767185B2
Methods and systems are provided for determining whether a search query with an observed number of occurrences in a set of search queries is a local search query. In accordance with one implementation, a method is provided that comprises determining an expected number of occurrences of a search query and comparing the expected number of occurrences to a threshold. Further, the method includes determining whether the search query is a local search query based, at least in part, on the comparison.
US09767176B2
Embodiments disclosed herein relate to systems, methods, and computer program products for transforming an unstructured database into a structured database. In some embodiments, the system and method imports an unstructured database comprising entities and a hierarchy associated with the entities. The system and method analyze the unstructured database, flatten the database so that a recursive database is converted into a database that fully expands all entities into lower levels, and identifies instances of unbalanced or ragged hierarchies. The system populates the database according to predetermined rules to address the unbalanced or ragged hierarchies and outputs a structured database that can be used for accurate analysis of the hierarchy and entities stored therein, such as corporate structure hierarchies or stock inventory hierarchies.
US09767175B2
The present invention provides a method of transferring content from a file and a database. In this case, the file includes content instances, each content instance being associated with a respective field, and each field having a respective type. The transfer is achieved by determining the type of each field, and then storing each content instance in a store in accordance with the determined field type of the associated field. Each content instance can then be transferred to the database in accordance with the determined field type. A similar procedure is provided for creating XML files based on content within the database.
US09767173B2
Systems and methods for interest-driven data sharing in interest-driven business intelligence systems in accordance with embodiments of the invention are illustrated. In one embodiment, an interest-driven data sharing server system includes a processor, a memory configured to store an interest-driven data sharing application, raw data storage, metadata storage configured to store data description metadata describing the raw data, and report storage configured to store previously generated reports, wherein the interest-driven data sharing application configures the processor to receive a report specification, locate at least one previously generated report stored in the report storage, identify raw data stored in the raw data storage using the data description metadata and at least one of the reporting data requirements, calculate redundant data metadata using the located previously generated reports and the identified raw data, determine modified reporting data requirements, retrieve updated source data, and generate reporting data based on the updated source data.
US09767172B2
An interactive user interface for displaying projects comprising a collection of links specifying data to be displayed from a plurality of different applications and/or data sources. When loading a project for display, links are automatically parsed to identify the application and/or data source they are associated with. Retrieved data associated with the links is displayed in a format based upon that of their native application. The data may be displayed in an interactive format, allowing the user to change or manipulate the data in a manner that would be possible in the data's native application. A project may be expressed as a “project link,” comprising a text string, wherein the links of the assets associated with the project are included or embedded within the text string, and which may be shared between different users, and may function as a snapshot of the project.
US09767171B2
Disclosed is a system, method, and computer program product for implementing a log analytics method and system that can configure, collect, and analyze log records in an efficient manner. An improved approach is provided for identifying log files that have undergone a change in status that would require retrieve of its log data, by including a module directly into the operating system that allows the log collection component to be reactively notified of any changes to pertinent log files.
US09767158B1
A user bucketing module on a server in a content sharing platform identifies, in the content sharing platform, a bucket comprising a plurality of associated content items and associates a bucketing token with each of the plurality of associated content items. The user bucketing module receives a request for the bucketing token from a ranking service and provides the bucketing token to the ranking service, the ranking service to apply the bucketing token to a ranking algorithm to determine a ranking score for a content item of the plurality of associated content items.
US09767154B1
Techniques for improving data compression of a storage system in an online manner are described herein. According to one embodiment, in response to a sequence of data to be stored, the sequence of data is partitioned into a plurality of data chunks according to a predetermined chunking algorithm. A sketch for each of the data chunks is generated based on one or more features extracted from the data chunk. Each of the data chunks of the sequence of data is associated with one of a plurality of groups based on the sketch, wherein each group is represented by a sketch. The data chunks of each group are compressed and stored in a compression region of the storage systems, such that similar data chunks are compressed and stored in the same compression region.
US09767150B2
A system and/or method are implemented to process queries to a database. In particular, the processing of queries to the database is enhanced by enhancing the determination of join orders of tables implicated in queries. Join orders between relatively large numbers of tables are determined by dividing the set of tables to be ordered into a plurality of subsets of tables, and ordering the individual subsets of tables.
US09767147B2
Performing database queries. A method includes receiving a particular database query. The method further includes accessing a query plan based on the particular database query. The query plan has operators and specific operational parameters associated with each of the operators. The association of operators and specific operational parameters is specific to the particular database query. From the query plan, the method further includes instantiating a plurality of compiled code templates. Each code template includes executable code that when executed performs functionality of one of the operators from the query plan with the specific operational parameters applied in the compilation. The method further includes binding the code templates together using programmatic control flow to create a functioning program.
US09767141B2
A method of processing a database can include comparing, using a processor, a delta file with a risk assessment criterion, wherein the delta file is generated from a first schema and a second and different schema, assigning a risk level to a change specified within the delta file according to the comparing, and applying the change of the delta file to a test database conforming to the first schema according to the assigned risk level.
US09767138B2
An in-database sharded queue for a shared-disk database is provided. First messages from at least one first enqueuer are stored on a first queue shard. The first enqueuer/s execute in a first instance of a shared-disk database system. The first shard includes a first plurality of subshards. Second messages from at least one second enqueuer are stored on a second queue shard. The second enqueuer/s execute in a second instance of the shared-disk database system. The second shard includes a second plurality of subshards. In volatile memory of the respective instances, a first message cache and a second message cache is maintained for the first shard and the second shard. The respective message caches include at least one buffer associated with the plurality of subshards.
US09767137B2
A method and system of verifying data stored in a database, by polling one or more computing devices. A server generates a poll object for a data item and a poll notification is transmitted to the one or more computing devices, whereupon users of the computing devices may respond to the poll notification and transmit responses. A set of response notifications is received and the server determines if the set of response notifications satisfies a quorum criterion. If the quorum criterion is satisfied, the server determines a data verification result, based on a tally criterion.
US09767120B2
Embodiments of the present invention allow multiple checkpoints to be taken so that multiple versions of the filesystem, including a working version and at least two checkpoint versions, can be maintained over time. Specifically, at least three “superblock” root structures are used to manage multiple instantiations of the filesystem. The superblocks are preferably stored in fixed locations within the storage system for easy access, although they may alternatively be stored in other ways. The number of superblocks may be fixed or variable.
US09767111B1
Example embodiments of the present invention leverage the punch command and thin LUNs in order to create a fully dynamic journal which can shrink and grow on demand. The journal may be assigned a maximum allowed size, as well as a journal protection window defining a period for which the journal should retain journal information. A set of currently used blocks will be used and, if protection window is large enough, the oldest data blocks from an undo stream will be punched out from the stream. A manager may monitor how much free space there is in the storage pool and regulate the journal growth if the pool is nearly empty. Additionally, the journal capacity may also depend on the actual usage of the replicated LUNs if the replicated LUNs are thin (i.e., maintain the journal at a particular percentage of the used storage capacity).
US09767099B2
Systems, apparatus, and methods are provided for providing dynamic interaction with a research publication database.
US09767098B2
A cost-effective, durable and scalable archival data storage system is provided herein that allow customers to store, retrieve and delete archival data objects, among other operations. For data storage, in an embodiment, the system stores data in a transient data store and provides a data object identifier may be used by subsequent requests. For data retrieval, in an embodiment, the system creates a job corresponding to the data retrieval and provides a job identifier associated with the created job. Once the job is executed, data retrieved is provided in a transient data store to enable customer download. In various embodiments, jobs associated with storage, retrieval and deletion are scheduled and executed using various optimization techniques such as load balancing, batch processed and partitioning. Data is redundantly encoded and stored in self-describing storage entities increasing reliability while reducing storage costs. Data integrity is ensured by integrity checks along data paths.
US09767095B2
An apparatus for assisting a human translator includes a source text module, a translator workspace module, a parsing module, a selection module, and a glossary module. The source text module receives source text in a source language. The translator workspace module displays a translator workspace field that is editable by a user. The parsing module parses the source text received by the source text module into separate portions. The selection module selects a first portion (first selected portion) of the separate portions for translation. The glossary module displays a term for term translation of the first selected portion of source text in a target language.
US09767090B2
Embodiments of the present invention provide a method and an apparatus for word detection in an application program. The method includes extracting a resource file from a multilingual application program installation package and converting the resource file into a text file. The method further includes disassembling the text file according to a language version to acquire a corresponding language text file; invoking a language detection tool according to the language version; and checking the language text file by using the language detection tool to identify questionable character information. The apparatus for word detection includes a file processing module, configured to extract a resource file from a multilingual application program installation package, and convert the resource file into a text file; and a disassembling module, configured to disassemble the text file according to a language version to acquire a corresponding language text file. The apparatus further includes a tool invoking module, configured to invoke a language detection tool according to the language version; and a text detection module, configured to check the language text file by using the language detection tool to identify questionable character information. Word detection efficiency in an application program can be improved by adopting the present disclosure.
US09767083B2
A method, system, and/or computer program product automatically detects CSS conflicts. The method comprises: receiving at least one UI constraint and at least one first CSS rule defined by a developer of a widget as well as at least one second CSS rule customized by a user of the widget, the UI constraints being used to restrict the UI of the widget; running a page containing the widget; performing automatic validation on each UI constraint based on the result of running the page; and in response to deriving a UI constraint being violated from the validation, finding one or more of the second CSS rules that lead to violation of the UI constraint in a first set made up of the second CSS rules that override the first CSS rules.
US09767071B2
The execution engine is a new organization for a digital data processing apparatus, suitable for highly parallel execution of structured fine-grain parallel computations. The execution engine includes a memory for storing data and a domain flow program, a controller for requesting the domain flow program from the memory, and further for translating the program into programming information, a processor fabric for processing the domain flow programming information and a crossbar for sending tokens and the programming information to the processor fabric.
US09767063B2
System and method for providing adaptive access to a hardware block on a computer system. In one embodiment, a method includes receiving a first access request and a second access request with an access controller, wherein the second access request is received sequentially after the first access request, and the first access request includes a first master identification and the second access request includes a second master identification, determining if the second master identification is equal to the first master identification, providing access to the second access request if the second master identification is equal to the first master identification, wherein the first master identification is associated with one or more hardware block interface values, invalidating the one or more hardware block interface values associated with the first master identification if the second master identification is not equal to the first master identification, and associating the one or more hardware block interface values with the second master identification and a corresponding privilege.
US09767061B2
An electronic device includes: a communication module; an input module; a display; an interface; at least one sensor; a memory; and a processor module. The processor module includes at least one of: at least one dummy chip including at least one Through Silicon Via (TSV); at least one memory bridge including at least one TSV; at least one memory connected to the at least one dummy chip and the at least one memory bridge and that can exchange an electric signal through the at least one dummy chip and the at least one memory bridge; or at least one processor. The at least one processor may be configured to exchange an electric signal through the at least one memory bridge, and to transmit an electric signal to at least one of the communication module, input module, display, interface, at least one sensor, or first memory. The at least one processor may exchange information via a circuit path that includes at least one of the memory bridge and a portion of the at least one memory, when transmitting the electric signal.
US09767059B2
The present invention relates to a multimedia server means, comprising a plurality of universal serial bus, USB, connections and a processing means configured to establish a one-by-one data connection between a USB data storage device connected to a first one of the plurality of USB connections and an electronic device connected to a second one of the plurality of USB connections.
US09767058B2
A solid state drive (SSD) apparatus including a plurality of solid state drives, a channel-interleaved interface operably coupled to the solid state drives, and a Peripheral Component Interconnect Express (PCIe) bridge operably coupled to the channel-interleaved interface.
US09767057B2
Methods and hardware data structures are provided for tracking ordered transactions in a multi-transactional hardware design comprising one or more slaves configured to receive transaction requests from a plurality of masters. The data structure includes one or more counters for keeping track of the number of in-flight transactions; a table that keeps track of the age of each of the in-flight transactions for each master using the one or more counters; and control logic that verifies that a transaction response for an in-flight transaction for a particular master has been issued by the slave in a predetermined order based on the tracked age for the in-flight transaction in the table.
US09767038B2
Systems and methods for accessing a unified translation lookaside buffer (TLB) are disclosed. A method includes receiving an indicator of a level one translation lookaside buffer (L1TLB) miss corresponding to a request for a virtual address to physical address translation, searching a cache that includes virtual addresses and page sizes that correspond to translation table entries (TTEs) that have been evicted from the L1TLB, where a page size is identified, and searching a second level TLB and identifying a physical address that is contained in the second level TLB. Access is provided to the identified physical address.
US09767033B2
In the present invention, a base station determines from a communication system whether a first content, which is requested by a mobile terminal, is saved on a cache memory, attributes a predetermined priority ranking to the first content and saves same on the cache memory when the first content is not saved on the cache memory, and updates the priority ranking of the first content on the basis of a predicted popularity of the first content, wherein the predicted popularity is decided on the basis of change in the number of views of a content that corresponds to a category of the first content.
US09767029B2
For serving sequential read patterns from a compressed journal storage system, a construction area cache algorithm is used to temporarily store the read and decompressed data in a user view sequential order to minimize disk I/Os and CPU utilization while serving the data to the user.
US09767023B2
A second computer transmits, to a first computer, confirmation data including identification information and a version number of copy data updated in a cache. Based on the confirmation data received from the second computer and information stored in the persistent storage device, the first computer extracts the identification information and the version number corresponding to the copy data to be written to the persistent storage device, from the confirmation data, and transmits response data including the extracted identification information and the version number to the second computer. Based on the response data received from the first computer and information stored in the cache, the second computer determines the copy data in the cache to be transmitted to the first computer so as to be written to the persistent storage device.
US09767019B2
An example method of managing memory includes identifying a first object of the first type to update, the first object being stored on a heap. The method also includes reading a first memory address stored in a second object of the second type and storing a copy of the first object at a second memory address. The first memory address is an initial memory address of the first object. The method further includes after the copy is stored, reading a third memory address stored in the second object. The third memory address is a current memory address of the first object. The method also includes determining whether the first memory address matches the third memory address, and when the first memory address is determined to match the third memory address, updating the first memory address stored in the second object with the second memory address.
US09767015B1
Methods and apparatus for enhancing operating system integrity using non-volatile system memory are described. A computer system includes a system memory coupled to one or more processors. The system memory comprises at least a non-volatile portion. Memory is allocated from the non-volatile portion to store selected metadata associated with an operating system component that supports input-output (I/O) operations. In response to an operation that results in a metadata change at the component, a metadata entry is stored in the non-volatile portion. Subsequent to a failure event, contents of the metadata entry are read from the non-volatile portion to restore a state of the component.
US09767006B2
A tracing management system may use cost analyzes and performance budgets to dispatch tracing objectives to instrumented systems that may collect trace data while running an application. The tracing management system may analyze individual tracing workloads for processing, storage, and network performance costs, and select workloads to deploy based on a resource budget that may be set for a particular device. In some cases, complementary tracing objectives may be selected that maximize consumption of resources within an allocated budget. The budgets may allocate certain resources for tracing, which may be a mechanism to limit any adverse effects from tracing when running an application.
US09766995B2
According to one embodiment, a system includes probes operable to monitor information associated with a host device and includes a controller operable to control the probes. A first probe instance is associated with a plurality of monitoring modules. Each monitoring module is operable to monitor information associated with the host device. The first probe instance is operable to determine a resource usage associated with the first probe instance and determine whether the resource usage exceeds a threshold. The first probe instance is operable to divide the plurality of monitoring modules into a first subset of monitoring modules and a second subset of monitoring modules. The first probe instance is operable to spawn a second probe instance, wherein the second probe instance is associated with the second subset of monitoring modules. The first probe module is operable to associate the first probe instance with the first subset of monitoring modules.
US09766992B2
Techniques are disclosed relating to storage device failover. In one embodiment, a plurality of storage devices are represented as cluster resources to a cluster resource manager that manages cluster resources on a plurality of cluster nodes. An indication may be received that a failover operation is requested with respect to one of the plurality of storage devices. In response to the indication, the cluster resource manager may initiate the failover operation. In some embodiments, the failover operation includes changing a first access state of the storage device and a second access state of another storage device. In such an embodiment, the storage device and the other storage device may be associated with a logical unit number. In some embodiments, the storage device is located within a first of the plurality of cluster nodes; the other storage device is located within a second of the plurality of cluster nodes.
US09766990B1
A checkpoint device is a transaction-based block device wherein data is committed to non-volatile memory (NVM) or tiered storage upon completion of a checkpoint. Automatic and instant rollback to the previous checkpoint is provided upon restart if any failure occurred during the previous checkpoint. Related techniques are also described.
US09766987B2
The data storage system according to certain aspects can implement table level database restore. Table level database restore may refer to restoring a database table and its related data without restoring the entire database. The data storage system may use table metadata index to implement table level restore. A table metadata index may be created for each table, e.g., during a backup of the database. The table metadata index for a table can include any type of information for restoring the table and its related data. Some examples of the type of information included in the table metadata index include the following: container for the table, table backup location, system data, table index, table relationships, etc. Table metadata index can make the restoring of tables fast and efficient by packaging information that can be used to restore a table and its related data in an easily accessible manner.
US09766984B2
A system includes obtaining of a backup of the source database system comprising N hosts and a first plurality of servers, where N is an integer greater than one, access of a target database system comprising M hosts, where M is an integer less than N, configuration of the target database system to include the first plurality of servers, and performance of a database recovery of the target database system using the backup of the source database system.
US09766982B2
A determination is made of a plurality of components whose states are to be determined to generate a statesave. At least one central processing unit that determines a state of a first component of the plurality of components faster than other central processing units is assigned to determine the state of the first component to include in the statesave, where more processing operations have to be performed to determine the state of the first component in comparison to any other component of the plurality of component. One or more of the other central processing units are assigned to other components of the plurality of components to determine states of the other components to include in the statesave.
US09766980B1
Individual storage devices of a RAID group are monitored for faults. A health indicator for each storage device is calculated based on fault growth rate. Non-failed storage device are swapped out based on the health indicator. Techniques for monitoring the storage devices include background media scans and growth list polling.
US09766975B2
Embodiments described herein include a computing system that permits partial writes into a memory element—e.g., a register on a processor. For example, the data to be written into the memory element may be spread across multiple sources. The register may receive data from two different sources at different times and perform two separate partial write commands to store the data. Embodiments herein generate an ECC value for each of the partial writes. That is, when storing the data of the first partial write, the computing system generates a first ECC value for the data in the first partial write and stores this value in the memory element. Later, when performing the second partial write, the computing system generates a second ECC value for this data which is also stored in the memory element.
US09766973B2
A default read operation is performed on a page using a default read voltage set to generate default raw data. If error bits of the default raw data are not corrected, a plurality of low-level read operations is performed on the page using a plurality of read voltage sets to generate a plurality of low-level raw data. Each read voltage set is different from the default voltage set. A read voltage set is selected from the plurality of read voltage sets as a starting voltage set, according to each low-level raw data. A high-level read operation using the selected starting voltage set is performed on the page to generate high-level raw data.
US09766960B2
Techniques and architectures for workload management. A stream of messages is received with servers coupled to provide access to shared system resources. The servers are organized as at least two groups with a first group providing message queuing services and a second group providing message queuing services under first conditions and modified message queuing services under second conditions. Message queuing services are provided with the first group by treating all jobs as equal, processing jobs asynchronously and processing jobs in the background to defer to foreground, non-message queuing services, jobs. Message queuing services are provided with the second group by treating all jobs as equal, processing jobs asynchronously and processing jobs in the background to defer to foreground, non-message queuing services, jobs under the first conditions. Modified message queuing services are provided with the second group by shortest-slack-first scheduling under the second conditions.
US09766959B2
In some examples, a technique may include outputting information associated with a notification. The notification may be associated with a notification attribute. The technique may further include determining, by a computing device, that a user has perceived the information associated with the notification; and receiving, by the computing device, an indication of at least one physiological parameter representative of a reaction of the user to the information associated with the notification. In some examples, the technique also includes, responsive to receiving the indication of the at least one physiological parameter representative of the reaction of the user to the information associated with the notification, controlling, by the computing device, at least one notification configuration setting related to outputting information associated with other notifications associated with the notification attribute.
US09766957B2
The present invention gives the methods and processes for automatically servicing user driven requests to find placeholder fields, fill them in with relevant data in a secure manner and securely communicating the data related thereto to the appropriate Android™ device and/or application. More particularly, it relates to the methods and processes for authenticated users to automatically obtain and use the correct filled-in data that allows them to access or use any of a multiple number of Android™ applications and/or services at any time.
US09766953B2
A visual software development system in which a user can graphically build a design or software solution without having to write software code includes one or more adapters that interrogate interfaces of the software platform that a software system or systems is built in accordance with and generate descriptions that the user can then incorporate into the design. The software systems can be of disparate technology platforms, an adapter provided that suits each platform. The descriptions can be represented graphically for the user with icons in an integrated development environment (IDE), and the user can build the design by dragging or otherwise selecting descriptions to be used and connecting them together to graphically represent the flow of information or communication of events among the descriptions.
US09766952B2
One or more techniques and/or systems are provided for implementing a reverse protocol launch. For example, the reverse protocol launch may be implemented between apps (e.g., as an app-to-app protocol) such that a user may navigate between apps in a contextually relevant manner using the reverse protocol launch. In an example, a search app may display vacation search results based upon a search query. Responsive to a selection of a vacation movie search result, a transition to a movie app may occur. A context, specifying a contextual state of the search app (e.g., information regarding the vacation search results, the search query, etc.), may be sent to the movie app. The movie app may implement a reverse protocol launch using the context to transition from the movie app back to the search app in the contextual state (e.g., the search app may be repopulated with the vacation search results, etc.).
US09766946B2
An approach is provided to dynamically select a micro-threading (MT) mode of each core of a processor based on a load on each of the respective cores while the processor is running a hypervisor. The approach sets a core's micro-threading mode to a whole-core mode (MT1) in response to identifying that the load on the selected core is at a light load level, sets the core's micro-threading mode to a two-way micro-threading mode (MT2) in response to identifying that the load on the selected core has increased above the light load level, and sets the selected core's micro-threading mode to a four-way micro-threading mode (MT4) in response to identifying that the load on the selected core is at a high load level.
US09766937B2
Embodiments relate to thread-based cache content savings for task switching in a computer processor. An aspect includes determining a cache entry in a cache of the computer processor that is owned by the first thread, wherein the determination is made based on a hardware thread identifier (ID) of the first thread matching a hardware thread ID in the cache entry. Another aspect includes determining whether the determined cache entry is eligible for prefetching. Yet another aspect includes, based on determining that the determined cache entry is eligible for prefetching, setting a marker in the cache entry to active.
US09766933B2
Computing capacity of a computing environment can be managed by controlling it associated processing capacity based on a target (or desired) capacity. In addition, fine-grained control over the processing capacity can be exercised. For example, a computing system can change the processing capacity (e.g., processing rate) of at least one processor operating based on a target capacity. The computing system may also be operable to change the processing capacity based on a measured processing capacity (e.g., a measured average of various processing rates of a processor taken over a period of time when a processor may have been operating at different processing rates over that period). By way of example, the processing rate of a processor can be switched between 1/8 and 2/8 of a maximum processing rate to achieve virtually any effective processing rates between them.
US09766924B2
A task processor includes a CPU, a save circuit, and a task control circuit. A task control circuit is provided with a task selection circuit and state storage units associated with respective tasks. When executing a predetermined system call instruction, the CPU notifies the task control circuit accordingly. When informed of the execution of a system call instruction, the task control circuit selects a task to be subsequently executed in accordance with an output from the selection circuit. When an interrupt circuit receives a high-speed interrupt request signal, the task switching circuit controls the state transition of a task by executing an interrupt handling instruction designated by the interrupt circuit.
US09766919B2
Methods and apparatus to select virtualization environments are disclosed. An example method includes determining, via a processor, characteristics of a virtualized application that is awaiting deployment, analyzing, via the processor, the characteristics of the virtualized application to select a subset of virtualization environments that are capable of executing the virtualized application, the subset of virtualization environments selected from a set of virtualization environments of different virtualization environment types used in the datacenter, comparing, via the processor, the characteristics of the virtualized application to the virtualization environments of the subset of virtualization environments to determine scores for the virtualization environments, and deploying the virtualized application in the virtualization environment based on the scores.