US08064319B2
An objective lens consists of a single lens element, and has a light source side surface formed into a convex surface having a large curvature and an optical recording medium side surface has a small curvature. The both surfaces are aspheric surfaces. Also, the objective lens satisfies the following expressions (1) to (3): 0.7
US08064317B2
An optical pickup apparatus is provided with: an astigmatic element for introducing astigmatism to a reflected light from a recording medium; and an optical element for varying advancing directions of luminous fluxes within four different luminous flux regions with one another, out of the reflected light, so as to scatter the luminous fluxes within the four luminous flux regions with one another. When an intersecting point of two mutually crossing straight lines respectively parallel to a first direction by the astigmatic element and a second direction vertical to the first convergence direction is aligned to an optical axis of the reflected light, the two luminous flux regions are placed in a direction where a set of vertical angles created by the two straight lines forms a line, and the remaining two luminous flux regions are placed in a direction where the other set of vertical angles forms a line.
US08064311B2
A cleaning disc for a media reading device having a laser lens. The cleaning disc includes a first surface configured to face the laser lens, a brush extending outwardly from the first surface, and a recess in the first surface configured to receive at least a portion of the brush when the brush contacts the laser lens during a cleaning operation. Each brush is defined by a strand of material that includes opposite ends. A first end of the material extends through a first aperture to define a first brush and a second end extends through a second, spaced apart aperture to define a second brush. A middle portion of the strand of material extends along a second surface of the cleaning disc between the first and second apertures, and is covered by a cover.
US08064306B2
When a hybrid optical disc is loaded on a player, the next generation DVD layer is reproduced in preference to the DVD layer. Jump to the DVD layer is appropriately performed based on the content of the reproduction list held in the next generation DVD. The jump to the DVD layer is performed based on the command information (jump command) held in the reproduction list of the next generation DVD layer. When reproduction of the title specified by the command information is finished after the jump to the DVD layer, the process returns to the HDDVD layer, and reproduction is performed from the position following the reproducing position at the time of the jump. Thus, the content of the HDDVD layer and the content of the DVD layer are reproduced as one stream.
US08064303B2
The invention relates to a method for setting an optimum value of a write parameter for use in an optical recording apparatus for writing information on an optical recording medium by means of a radiation beam. The optimum value of a write parameter is found by deriving a plurality of characteristic write power levels (PChar) from a plurality of curve-fitting functions. Each characteristic write power level (PChar) has an associated initial value of the write power level (TV), and the optimum value of the write parameter is found by comparing the characteristic write power levels to the initial write power levels. The invention also relates to an optical recording apparatus for recording information on an optical recording medium, the apparatus having a radiation source for emitting a radiation beam having a controllable value of a write power level for recording information on the recording medium.
US08064302B2
A drawing pulse generating unit of an optical disk recording apparatus judges a bit stream of main data contained in a bit stream signal of frame-formatted data, and generates pulse signals DOTX 1 and DOTX 2 based upon the judgment, and then, outputs the generated pulse signals DOTX 1 and DOTX 2 to the gate circuit. In a time period during which a signal level of the pulse signal DOTX 1 is an “H” level, the gate circuit supplies a bit stream signal of the frame-formatted data to a laser driver. In a time period during which a signal level of the pulse signal DOTX 1 is an “L” level, the gate circuit supplies a bit stream signal indicative of an erase level to the laser driver. The laser driver controls an optical pickup so that a laser light having strength indicative of the bit stream signal is irradiated.
US08064296B2
An optical head is provided with a light source for emitting a first laser beam having a first wavelength shorter than 430 nm, a two-wavelength light source for emitting a second laser beam having a second wavelength equal to or longer than 430 nm, a flat beam splitter in the form of a single plate for reflecting the first laser beam emitted from the light source, a wedge prism in the form of a single plate for reflecting the first laser beam reflected by the flat beam splitter and transmitting the second laser beam emitted from the two-wavelength light source, and an objective lens for focusing the first laser beam reflected by the wedge prism on an information recording surface of a BD. The light source is arranged such that the optical axis of the first laser beam emitted from the light source is inclined with respect to that of the second laser beam emitted from the two-wavelength light source. By this construction, the miniaturization of the optical head can be realized.
US08064282B2
An access area is set within an address space of a dynamic random access memory by arranging two or more complete columns of blocks, in which blocks of memory cells are arranged within an entirety of a specified range of row addresses, along a direction of column addresses. Each of the blocks includes memory cells positioned at a same row address and a specified number of consecutive column addresses. The total number of blocks arranged in the access area is just capable of storing the number of words of the data to be stored. The two or more complete columns of blocks are successively accessed by successively accessing the blocks arranged in each of the columns of blocks. Thereby, a refresh operation of the dynamic random access memory is made unnecessary.
US08064273B2
A memory device is disclosed that includes multiple bit cells, whereby each bit cell is capable of being programmed to more than two states. A value stored at the memory device is determined by comparing the information stored at three or more of the bit cells. In an embodiment, the bit cell includes a silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (FET) device, and the information stored at the bit cell can be represented by a corresponding level of charge stored in the body of the device.
US08064272B2
A semiconductor memory device comprises a plurality of memory layers arranged in multilayer, each memory layer including a cell array, the cell array containing a plurality of first parallel lines, a plurality of second parallel lines arranged crossing the first lines, and a plurality of memory cells connected at intersections of the first lines and the second lines; a pulse generator operative to generate pulses required for data access to the memory cell; and a control means operative to control the pulse generator such that the pulse output from the pulse generator has energy in accordance with the memory layer to which the access target memory cell belongs.
US08064268B2
An integrated circuit device includes a serial peripheral interface adapted for receiving a first command supporting an address of a first configuration, wherein the serial peripheral interface supports an address of a second configuration upon receipt of a second command, the second configuration being different from the first configuration. In a specific embodiment, the first and the second configurations are different in address length. In another embodiment, a second address cooperated with the second command has a first part and a second part, the second part comprising a plurality of byte addresses, each of the byte addresses being associated with a corresponding byte of data. In another embodiment, integrated circuit device also includes a mode logic circuit for controlling operations of the first command and the second command. Various other embodiments are also described.
US08064267B2
In erasing a memory block of memory cells, a semiconductor tub that contains a memory block to be erased can be biased with a high, positive voltage. The control gates of the memory cells that make up the memory block can be biased with a negative voltage. An erase verification can then be performed to determine if the memory block has been successfully erased. If the memory block has not been erased, the erase operation of biasing the tub with the positive voltage and the control gates with the negative voltage can be repeated until the erase verification is successful.
US08064266B2
Memory devices, and methods of writing data to memory devices, utilizing analog voltage levels indicative of threshold voltages and desired threshold voltages of memory cells.
US08064263B2
Source-side sensing techniques described herein determine the data value stored in a memory cell based on the difference in current between the read current from the source terminal of the memory cell and a sink current drawn from the read current. The sink current is drawn in response to the magnitude of a reference current provided by a reference current source such as a reference cell.
US08064262B2
A semiconductor device in accordance with one embodiment of the invention can include a first data storage region including a non-volatile main data storage region. Additionally, the semiconductor device can include a second data storage region including a non-volatile reference region wherein an erasing operation and a writing operation are performed on both the first data storage region and the second data storage region. Moreover, the semiconductor device can also include a control unit coupled to the first and second data storage regions which determines a stress condition corresponding to the first data storage region based on a stress information related to the second data storage region.
US08064260B2
Power supplies in flash memory devices are disclosed. A first section of a flash memory device includes non-volatile memory for storing data. A second section of the flash memory device includes at least first and second pumping circuits. The first pumping circuit receives a first voltage and produces, at an output of the first pumping circuit, a second voltage at a second voltage level that is higher than the first voltage level. The second pumping circuit has an input coupled to the first pumping circuit output for cooperatively employing the first pumping circuit to pump up from a voltage greater than the first voltage to produce a third voltage at a third voltage level that is higher than the second voltage level.
US08064259B2
A nonvolatile memory device includes a word line group including a plurality of middle word lines and an edge word line having charge storage patterns on a substrate. A peripheral line is disposed on one side of the word line group so that the edge word line is between the peripheral word line and the middle word lines. The peripheral line includes an insulating layer and a gate electrode. Charge storage patterns of the middle and edge word lines are separated from each other, and a charge storage pattern of the edge word line extends on one side to be connected to the insulating layer of the peripheral line. Methods of forming nonvolatile memory devices are also disclosed.
US08064255B2
A process of operating a memory array includes performing all volatile and nonvolatile operations on an nvDRAM cell array via a single data interface and using only DRAM-level signals on the data interface.
US08064247B2
Memory devices described herein are programmed and erased by physical segregation of an electrically insulating layer out of a memory material to establish a high resistance state, and by re-absorption of at least a portion of the electrically insulating layer into the memory material to establish a low resistance state. The physical mechanism of programming and erasing includes movement of structure vacancies to form voids, and/or segregation of doping material and bulk material, to create the electrically insulating layer consisting of voids and/or dielectric doping material along an inter-electrode current path between electrodes.
US08064242B2
For replacing SRAM with very high speed FRAM, new memory architecture is realized such that plurality of FRAM cells is connected to a local bit line pair, a local sense amp is connected to the local bit line pair, a global sense amp is connected to the local sense amp through a global bit line pair, and a locking signal generator is connected to the global sense amp for generating a locking signal which disables the local sense amp after reading for quick write-back operation. With short bit line architecture, bit lines are multi-divided for reducing parasitic capacitance of the local bit line, which realizes to reduce the ferroelectric capacitor proportionally. The FRAM cell includes an access transistor pair, a ferroelectric capacitor pair for storing positive data and negative data, and a reset transistor pair for resetting storage nodes. And various circuits for implementing the memory are described.
US08064240B2
A memory includes word lines; plate lines; first to eighth bit lines; cell transistors; ferroelectric capacitor connected in parallel with cell transistors; sense amplifiers, wherein cell transistors and ferroelectric capacitors configure cells, the cells are connected in series to configure first to eighth cell blocks, the cell blocks are connected to the same word lines, first ends of the cell blocks are respectively connected to the bit lines, second ends of the cell blocks are respectively connected to the different plate lines, one of the first to the fourth bit lines and one of the fifth to the eighth bit lines are configured to be selectively connected to the sense amplifier during an operation, numbers of the cells connected in series between the bit lines and the plate lines are different in the first to the fourth cell blocks, and are different in the fifth to the eighth cell blocks.
US08064236B2
In a multi-rank memory module having a terminal resistance of a data input/output pad 13 and a terminal resistance control pad 14 that inputs a signal that controls on/off of the terminal resistance, a high-speed operation is enabled with the aid of an enclosed terminal resistance, even in cases where the number of ranks is greater than that of terminal resistance control terminals (ODT terminals) provided on the memory module. To this end, a terminal resistance control pad 14 of a memory chip 12, having a longer length of an interconnect between a data bus 19 on a module substrate 8 and a data input/output pad 13, is connected to a terminal resistance control interconnect 18 or 21 to control the on/off of the terminal resistance from the ODT terminal. A terminal resistance control pad on a memory chip 11, having a shorter length of an interconnect between the data bus 19 on the module substrate and the data input/output pad 13, is connected to a fixed potential 20 to turn on the terminal resistance.
US08064235B2
In order to reduce parasitic inductance of a main circuit in a power supply circuit, a non-insulated DC-DC converter is provided including a circuit in which a power MOS•FET for a high-side switch and a power MOS•FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS•FET for the high-side switch is formed by a p-channel vertical MOS•FET, and the power MOS•FET for the low-side switch is formed by an n channel vertical MOS•FET. Thus, a semiconductor chip formed with the power MOS•FET for the high-side switch and a semiconductor chip formed with the power MOS•FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.
US08064233B2
A supplying power adjusting apparatus has excellent temperature response and excellent stabilities to power supply change and load change. The apparatus is provided with a semiconductor inverter for high-speed switching power control, which converts a direct current rectified by a rectifying circuit (10) into alternating current power in response to a control signal and supplies a heater (7) with the power; a temperature change detecting circuit (24) for detecting the temperature change of the heater (7); a power supply change detecting circuit (22) for detecting the power change of the rectifying circuit (10); a load change detecting circuit (23) for detecting the change of the alternating current power supplied to the heater (7); and a power control signal generating circuit (15) which calculates a power quantity to be supplied to the heater (7) and controls the frequency or duty ratio of a control signal to be added to the power controlling semiconductor inverter in response to the calculated results.
US08064229B2
In one embodiment, a control circuit for a series resonant switching power supply control system is configured to disable a power switch of secondary side of the system in response to a polarity reversal of the voltage across a primary side winding of the system.
US08064228B2
A power supply apparatus with a current-sharing function includes a conversion circuit, a square-wave generating circuit, a resonant circuit, and a rectifier-filter circuit. The conversion circuit has two transformers, and each of the transformers has a primary winding and two secondary windings. More particularly, two secondary windings of the different transformers are electrically connected in series and then the two in-series secondary windings are electrically connected in parallel. The square-wave generating circuit is used to switch a DC voltage into a pulsating voltage. The resonant circuit is electrically connected to the square-wave generating circuit, and having a first capacitor and the primary windings of the transformers. The rectifier-filter circuit has at least two switch components and a second capacitor, and electrically connected to the secondary windings of the transformers to rectify an AC output voltage into a DC output voltage, and the DC output voltage is outputted to at least one output terminal.
US08064226B2
The present invention discloses a control circuit with frequency compensation, which can be applied to an open-loop control system. The control circuit includes an oscillator which is additionally connected to a first comparator including a first input end, a second input end and a first output end. The first input end provides for inputting a sampling current, the second input end provides for inputting a total voltage of a reference voltage and a DC-level voltage, and the first output end outputs a down-conversion signal. When the sampling current is larger than the total voltage, the first comparator will generate the down-conversion signal to the oscillator to reduce a frequency of the oscillator, such that a current of the open-loop control system can be controlled effectively to prevent an electronic element form being burned down.
US08064225B2
A reactor arrangement for alternating electrical currents includes, for each alternating electrical current, different coils (105, 107, 105a, 107a) for positive and negative half-cycles of that alternating electrical current. The negative and positive half-cycles of the alternating electrical current are directed to the different coils with the aid of unidirectional electrical components (106, 108, 106a, 108a) such as, for example, diodes. All coils are arranged to magnetize a common magnetic core element (104) in a same direction. Therefore, from the viewpoint of the magnetization of the magnetic core element, the flowing directions of the alternating electrical currents are not significant. Hence, the common-mode inductance of the reactor arrangement has substantially a same value as the differential-mode inductance.
US08064211B2
An electronic component module is configured by a passive component mounted on a built-in IC substrate. The passive component is provided with a passive element inductor, and a mounting surface for mounting on a substrate. Concavities are respectively provided at parts of two opposed borders in the mounting surface, and a terminal electrode is provided at the bottom part of the concavities. Since the passive component has a concavity within the mounting surface and the terminal electrode is incorporated within this concavity, the passive component can be mounted low on the substrate surface. Since the terminal electrode is incorporated in the concavity, solder is prevented from spreading fillet-like at the periphery of the inductor, thus increasing the mounting density of the passive component. There is increased freedom for mounting the passive component because the passive component is mounted on the built-in IC substrate in which the IC is embedded in the substrate.
US08064206B2
A semiconductor memory device is provided with a wiring board which includes an element mounting portion and connection pads. Plural semiconductor memory elements are stacked on the element mounting portion of the wiring board. The semiconductor memory element of a lower side has a thickness greater than that of the semiconductor memory element of an upper side. The semiconductor memory elements are electrically connected to the connection pads of the wiring board via metal wires.
US08064200B1
Heat dissipating electronic components and circuitry in a communication chassis are cooled by moving air at least through a midplane, between two groups of channels that are laterally oriented relative to one another. In an illustrative embodiment, channels of one group are oriented vertically while channels of another group are oriented horizontally. Each channel, regardless of whether it is vertical or horizontal, is defined by space in the chassis between adjacent circuit boards. Circuit boards on one side of the midplane are electrically connected to circuit boards on the other side of the midplane by orthogonal connectors on the midplane. The midplane additionally has openings that enable movement of air between vertically-oriented channels and horizontally-oriented channels. Circuit boards of the two orientations are cooled by increasing air pressure in vertically-oriented channels or by decreasing air pressure in horizontally-oriented channels or both, depending on the embodiment.
US08064199B2
A memory cooling fan tray is composed of a bracket and a plurality of fans. The bracket is formed respectively with a plurality of abutting members, insertion members, and pivoting members. An interior of the bracket is formed with notch members, with a quantity corresponding to the number of fans. After the fans are loosely pivoted at the pivoting members, the fans can rotate freely on the bracket. Upon using, the bracket is inserted into a memory socket, and the fans are electrically connected with a power supply. Blow angles of the fans are adjusted by turning over the fans to change wind directions, so as to actively dissipate heat from the memory.
US08064196B2
An electronic apparatus is disclosed, including a substrate; a unit body part on whose lateral surface the substrate is provided; and a bracket part configured to retain the unit body part. The bracket part includes a first bracket part and a second bracket part to which the first bracket part is slidably attached. The first bracket part is slid with respect to the second bracket part, and when the bracket part is at a close position, the first bracket part fixes the substrate by pressing the substrate in a slide direction and an approximately vertical direction, and the unit body part is fixed to the bracket part.
US08064188B2
At least an embodiment of the present technology provides a capacitor, comprising a substrate, a first solid electrode disposed on the substrate, a second electrode broken into subsections, the subsections connected by a bus line and separated from the first electric by a dielectric medium. The second electrode broken into subsections may have a lower resistance than the first solid electrode and by changing the width and length of the sides of the subsections, the resistance of the first electrode is modifiable.
US08064179B2
A powered device includes an interface that is responsive to a powered network and an integrated circuit device that is coupled to the interface to receive power and data from the powered network. The integrated circuit device includes a power rectification and protection device to generate a rectified power supply related to the power received from the interface, a switching regulator to selectively activate a switched power supply to associated load circuitry, and a power over Ethernet (PoE) controller. The PoE controller controls the switching regulator to provide the switched power supply to the associated load circuit when the rectified power supply is within an operating range.
US08064165B2
Described herein are various embodiments of an electronic information storage apparatus and an associated method and system. For example, according to one illustrative embodiment, a disk drive comprises a base and at least one disk that are rotatably attached to the base. The at least one disk can include a burnished and lubricant-free outer surface. The disk drive can also include an actuator coupled to the base. The actuator can comprise a read/write head that is positionable in a reading/writing relationship with the at least one disk to define a lubricant-free space intermediate the read/write head and the outer surface. The disk drive can further include a read/write head loading and unloading ramp that is attached to the base. The ramp can include a ramp surface that is positioned proximate a periphery of the at least one disk.
US08064163B2
Provided are a perpendicular magnetic write head capable of achieving the high performance and stability in the writing performance, and a method of manufacturing the same. On a trailing side of a main magnetic pole layer, disposed are a gap layer extending backward from an air bearing surface and an auxiliary magnetic pole layer extending backward from a position recessed from the air bearing surface. The auxiliary magnetic pole layer is partially overlapped on the gap layer. In case the auxiliary magnetic pole layer is formed using etching method in the process of manufacturing the perpendicular magnetic write head, the gap layer has a function as an etching stopper layer so that the main magnetic pole layer is protected; thereby the already-formed main magnetic pole layer is not subjected to etching.
US08064157B2
A magnetic disk includes: a data recording region having first magnetic parts; the first magnetic parts being arranged in a circumferential direction in the nonmagnetic region and form tracks, and the tracks being arranged in a radial direction at a track pitch Tp; and a burst pattern region having burst patterns making a magnetic head follow the first magnetic parts, the burst patterns having second magnetic parts, the second magnetic parts forming base units arranged at a pitch Sp in a radial direction of the disk, the pitch Sp being more than twice as large as the track pitch Tp, the base units including a plurality of base units arranged in a circumferential direction of the disk, and the base units adjacent to each other in the circumferential direction being displaced from each other by the pitch Sp in the radial direction of the disk.
US08064149B2
Disclosed is a fisheye lens comprised of the first through the seventh lens elements: wherein a field of view is larger than 180° a calibrated distortion is 10% or less, a relative illumination is 80% or more, all the refractive surfaces of the lens elements are spherical surfaces, the first lens element is a negative meniscus lens element having a convex surface facing an object side, the second lens element is a bi-concave lens element, the third lens element is a positive meniscus lens element having a convex surface facing an image side, a stop is located between the third and the fourth lens elements, the fourth lens element is a bi-convex lens element, the fifth lens element is a bi-concave lens element, the sixth and the seventh lens elements are bi-convex lens elements.
US08064144B2
A zoom lens system according to the present invention, from an object side to an image side, comprises a first lens unit having positive optical power, a second lens unit having negative optical power, a third lens unit having positive optical power, and a fourth lens unit having positive optical power. In zooming, the first to the fourth lens units all move along the optical axis. The condition (8): 0.1535; dG3 is an optical axial center thickness of the third lens unit; dG is a sum of the optical axial thicknesses of the first to the fourth lens units; ω is a half view angle at a wide-angle limit; fT is a focal length of the entire system at a telephoto limit; and fW is a focal length of the entire system at a wide-angle limit). As a result, the zoom lens system has a reduced size and still realizes a wide view angle at a wide-angle limit, as well as a remarkably high zooming ratio and high performance.
US08064140B2
An optical grade article comprises a thermoplastic composition comprising a poly(aliphatic ester)-polycarbonate copolymer comprising 10 to 25 wt % of a soft block ester unit derived from a C20-44 aliphatic dicarboxylic acid or derivative thereof, 34 to 77 wt % of a carbonate unit derived from 2-hydrocarbyl-3,3-bis(4-hydroxyaryl)phthalimidine, 0 to 76 wt % of a carbonate unit derived from a dihydroxyaromatic compound not identical to the 2-hydrocarbyl-3,3-bis(4-hydroxyaryl)phthalimidine, wherein the weight percentages of soft block ester units, 2-hydrocarbyl-3,3-bis(4-hydroxyaryl)phthalimidine units, and dihydroxyaromatic compound units is 100 weight percent of the monomeric units of the poly(aliphatic ester)-polycarbonate, the refractive index of the thermoplastic composition is greater than 1.590, and the glass transition temperature of the poly(aliphatic ester)-polycarbonate is from 120 to 155° C. A camera lens also comprises the poly(aliphatic ester)-polycarbonate.
US08064135B2
Provided is a polarizing element, which is made into an assembly of metal elements by utilizing the fact that the plasmon resonance wavelengths of metal elements are different for the polarization direction of a light to irradiate the metal elements. The sum of the geometrically sectional areas of the metal elements in a plane substantially normal to the propagation direction of the irradiating light is smaller than the area of the irradiated region of the light, and the sum of the absorbing sectional areas of the metal elements in the plasmon resonance wavelengths is five times or more as large as the area of the irradiated region.
US08064132B1
A system and method are provided for removing a reticle from visualization in a displayed view in a binocular wherein the reticle is visible during direct scene view. The system includes a filter positioned between a display element and an eyepiece wherein a visual characteristic of the filter matches a corresponding characteristic of the reticle. These matching characteristics thereby render the reticle substantially “invisible” to the user. Exemplary filters can include a monochromatic filter and a polarizer.
US08064127B2
This invention relates generally to the field of quasicrystalline structures. In preferred embodiments, the stopgap structure is more spherically symmetric than periodic structures facilitating the formation of stopgaps in nearly all directions because of higher rotational symmetries. More particularly, the invention relates to the use of quasicrystalline structures for optical, mechanical, electrical and magnetic purposes. In some embodiments, the invention relates to manipulating, controlling, modulating and directing waves including electromagnetic, sound, spin, and surface waves, for a pre-selected range of wavelengths propagating in multiple directions.
US08064121B2
An acousto-optical component is suggested, in particular for use in the beam path of an optical arrangement, preferably of a microscope, with a crystal for the passage of light. Sound waves are generated via an electrical transducer and passed through the crystal. The sound waves passing through the crystal affect the optical properties of the crystal and therefore the light passing through the crystal. For exerting a variable influence on the light passing through the crystal, the sound waves passing through the crystal, or the acoustic field in the crystal, are/is variable.
US08064119B2
This invention provides a novel electrochemical display element, which can realize bright white display, high-contrast black and white display, and full-color display by a simple member construction, and a method for driving the display element. The display element is characterized in that it comprises opposed electrodes, and an electrolyte, an electrochromic compound, a metal salt compound, and a white scattering material between the opposed electrodes, and multicolor display of three or more colors is carried out by black display, white display, and display of color other than black by driving the opposed electrodes by taking advantage of 1) a color change as a result of oxidation and reduction reactions of the electrochromic compound, and 2) a color change as a result of reduction precipitation and oxidation dissolution of a metallic element contained in the metal salt compound in at least one of the opposed electrodes.
US08064117B2
An oscillating element which can improve the adhesiveness thereof with an actuator is disclosed. In an oscillating element which includes a substrate which is configured to support an oscillation portion in an oscillating manner, and a driving layer which is configured to oscillate the oscillation portion, the driving layer including an adhesive layer formed on a substrate side thereof, an intermediate layer is positioned between the substrate and the driving layer. The intermediate layer is made of a material which allows surface activation bonding with the substrate, and the surface roughness of the intermediate layer on the adhesive layer side is set coarser than the surface roughness of the intermediate layer on the substrate side thus allowing the intermediate layer to easily acquire an anchoring effect with the adhesive layer.
US08064115B2
A hologram recording/reproducing apparatus includes: a coherent light source; a spatial light modulator which spatially modulates light from the coherent light source; a Fourier transform lens which concentrates light modulated by the spatial light modulator upon a hologram medium; and a two-dimensional light-receiving element array which receives light from the hologram medium. The spatial light modulator is divided into a reference light area and a signal light area, and the divergence angle of reference light emitted from the reference light area is wider than the divergence angle of signal light emitted from the signal light area.
US08064109B2
An image reader and an image forming apparatus are provided. The image reader includes a stationary document scanning device; a moving document scanning device; a scan window; a document cover covering the scan window and comprising an opening located at a position facing the scan window; a document feeding mechanism which is disposed at the document cover and feeds a document through the opening in the document cover and onto the scan window when the document is to be scanned by the moving document scanning device; an image pickup device configured to read an image from the scan window; and a controller which detects edges of the stationary document based on image data read by the image pickup device, and performs an image data defining operation to determine image data, which is included within the detected edges of the document, as exact image data.
US08064104B2
A facsimile apparatus is provided with a scanning unit configured to scan a first image containing a specific image representing information related to a destination of a facsimile transmission, a setting unit configured to obtain and set the destination based on the specific image included in the first image, a generating unit configured to generate transmission data representing second image which is similar to the first image but the specific image is excluded, and a transmitting unit configured to transmit the transmission data generated by the generating unit to the destination set by the setting unit.
US08064103B2
An information embedding apparatus (200) which embeds information in each character in an original document includes an extraction unit (202) which extracts the circumscribed rectangles of characters from the original document, a selection unit (203) which selects, based on a predetermined condition, a character in which information is to be embedded, from the characters included in the respective circumscribed rectangles, an information embedding unit (204) which embeds information in a character selected by the selection unit (203) as the character in which information is to be embedded, a character generation unit (205) which generates a character not selected by the selection unit (203) at a lower pixel density per unit area than that of the character in which the information embedding unit (204) embeds the information, and an output unit (206) which outputs the original document processed by the information embedding unit (204) and the character generation unit (205).
US08064102B1
Embodiments are disclosed for generating an infrared mark indicator comprised of security information in a printed image. Image data is rendered to a CMYK image. A black plane of the CMYK image is separated and transformed to a frequency domain wherein the frequency components are alternated to encode the watermarking message. The CMY values are selected based on the encoded black value in order to maintain a same color appearance image for the printed image under a normal visual light illuminant. The image data is printed on the substrate in accordance with the transformed planes wherein upon the resultant printed image being exposed to infrared illuminant, a print pattern is detectable as an infrared mark when scanned with an infrared sensing device.
US08064097B2
A plurality of images stored in a storage medium are classified into image groups. The number of images stored in the storage medium is compared with a threshold value determined based on the number of classified image groups and the number of images included in each image group. An image group selection sheet or a print specification sheet is printed depending on a result of the comparison. Thus, it is possible to automatically determine an optimum type of sheet for use by a user to select images and print the determined type of sheet without printing a large number of sheets.
US08064093B2
A method enables users to make corrections to printed forms using a computer arrangement. The printed form is scanned and displayed to the user on a display of the computer arrangement. The user selects one or more regions of the printed form to be corrected. The selected regions are digitally whited out to create a corrected image that can be output.
US08064085B2
This invention relates to a system and method of processing print order requests in a print system comprising a central print controller, a plurality of remote print customers and a plurality of remote print suppliers, the central print controller being connected to the plurality of remote print customers and the plurality of remote print suppliers by way of a communications network. Print customers transmit their print order requests to one central print controller. The central print controller will have information relating to a number of print suppliers stored in the central print controller database and can ascertain which of the print suppliers is the most suitable print supplier for executing a particular order. The central print controller is able to obtain the different protocols and data formats used in the proprietary database systems of the print supplier from its own central print controller database and may then format the print order request into a format suitable for receipt by the print supplier.
US08064082B2
The present invention relates to a system and method for printing labels on-demand in a manufacturing environment. During initialization, an association is made between a part being manufactured and the work station in which the part is made. The association is stored in a computer application. When a user desires to print a label, the user simply presses a user input device which generates a print request. The print request is interrogated to determine which user input device originated the print request. An indicator may be presented to the operator indicating that a valid print request was received by the data storage device. The computer application searches for information related to the user input device that originated the print request. The data storage device transmits information from the computer application for printing to the associated printer.
US08064081B2
A print system for transmitting print data from a host PC to a printer by radio communication and performing printing. It is determined on the host PC side whether or not two-way communication by radio communication is possible, and if two-way communication is possible, information indicating that two-way communication is possible is transmitted to the printer. On the printer side, identification information of the host PC which transmitted the information indicating that two-way communication is possible is registered.
US08064068B2
A system for sensing a three-dimensional topology of a test surface is provided. A first illumination source generates first patterned illumination from a first point of view. A second illumination source generates second patterned illumination from a second point of view, the second point of view differing from the first point of view. An area array image detector simultaneously acquires at least first and second fringe images relative to the first and second patterned illuminations. A controller is coupled to the first and second sources and to the detector. The controller generates a height topology of the test surface based on images acquired while the first and second patterned illuminators are energized.
US08064064B2
Disclosed is an apparatus and method for obtaining images using coherent anti-stokes Raman scattering. The apparatus for obtaining images using coherent anti-stokes Raman scattering according to the present invention comprises: a pump light source and a stokes light source that irradiate pump light and stokes light on a sample to generate anti-stokes light having anti-stokes frequency; a reference light source that generates reference light; and an image obtaining unit that obtains the images of the sample using a change in phase of the reference light due to a change in the refractive index of the sample in the vicinity of the anti-stokes frequency. Thereby, the present invention can provide the apparatus for obtaining images using coherent anti-stokes Raman scattering that is not affected by a non-resonant background signal phenomenon, strong resistance against noise even in a weak signal, and has excellent sensitivity and resolution.
US08064062B2
A photometric apparatus and an automatic analyzer in which liquid samples contained in vessels are measured with light of different wavelengths while the vessels are transferred are provided. A photometric apparatus includes light sources that are arranged in the movement direction of a vessel and emit light of different wavelengths, light-receiving devices that are located opposing the light sources with the vessels interposed inbetween and receive light of different wavelengths emitted from the light sources. The arrangement length of light sources along the movement direction of the vessels is shorter than the arrangement pitch of the vessels.
US08064054B2
Methods (600) and systems (100) for inspecting an indirect bandgap semiconductor structure (140) are described. A light source (110) generates light (612) suitable for inducing photoluminescence in the indirect bandgap semiconductor structure (140). A short-pass filter unit (114) reduces long-wavelength light of the generated light above a specified emission peak. A collimator (112) collimates (616) the light. A large area of the indirect bandgap semiconductor structure (140) is substantially uniformly and simultaneously illuminated (618) with the collimated, short-pass filtered light. An image capture device (130) captures (620) images of photoluminescence simultaneously induced by the substantially uniform, simultaneous illumination incident across the large area of the indirect bandgap semiconductor structure. The photoluminescence images are imaged processed (622) to quantify spatially resolved specified electronic properties of the indirect bandgap semiconductor structure (140) using the spatial variation of the photoluminescence induced in the large area.
US08064048B2
A particle-moving type orientation sensor including a housing, at least one light emitter, two light receivers, and a plurality of particles. The housing has an accommodating space having four zones, which are circularly arranged. A first opening is formed on the housing and connecting to a first zone. Two second openings are formed on the housing and respectively connecting to a second zone and a fourth zone. The light emitter emits light into the accommodating space through the first opening. The light receivers respectively receive light from the accommodating space through the second openings. The particles are arranged in the accommodating space. While the particle-moving type orientation sensor is tilting, the light emitter is partially blocked by the particles, and one of the light receivers is partially blocked by the particles, the light receivers respectively receive light with predetermined intensities and output electric signals with predetermined strengths.
US08064047B2
Method and apparatus for contactless determination of lateral offset relative to a straight-ahead direction when an object moves relative to an object with a stochastic surface structure, in which the surface structure is imaged on at least two similar photosensors arranged behind one another at a defined separation in the straight-ahead direction and having a spatially resolving longitudinal extent transverse to the straight-ahead direction, a spatial frequency signal corresponding to the surface structure is generated by the sensors, the spatial frequency signal of a second sensor in the movement direction is read, temporally shifted relative to the spatial frequency signal of the first sensor, such that the same, at least partially overlapping surface structure is imaged on both sensors, the spatial frequency signals of the first and second sensors are correlated to determine a correlation coefficient, and the lateral offset of the correlated spatial frequency signals on the sensors is determined.
US08064043B2
A shutter blade apparatus includes a shutter blade; a first pushing member including two first pushing portions configured to push a first surface of the shutter blade; and a second pushing member including a second pushing portion configured to push a second surface of the shutter blade, the second surface being opposite to the first surface. The second pushing portion is located between the two first pushing portions.
US08064037B2
An exposure apparatus that by irradiating an exposure light, via a projection optical system and a liquid, on a substrate placed on the image plane side of the projection optical system, exposes the substrate, the exposure apparatus includes: a liquid supply system that supplies the liquid onto the substrate and a liquid recovery system that recovers the liquid having been supplied on the substrate. When the exposure light is being irradiated on the image plane side of the projection optical system, the liquid recovery system does not perform recovery of the liquid.
US08064036B2
An optical device has the structure to perform switching and attenuation of an optical beam with reduced polarization dependent loss (PDL). The optical device includes a birefringent displacer and two liquid crystal (LC) structures. The first LC structure is used to condition s-polarized components of the optical beam and the second LC structure is used to condition p-polarized components of the optical beam. Each LC structure has a separate control electrode so that the s-polarized components of the optical beam and the p-polarized components of the optical beam can be conditioned differently and in such a manner that reduces PDL. The optical device may be configured for processing multiple input light beams, such as the multiple wavelength channels de-multiplexed from a wavelength division multiplexed (WDM) optical signal.
US08064033B2
A display device includes a first substrate, a second substrate arranged to face the first substrate, and a seal member arranged to bond the first substrate and the second substrate to each other with a display medium layer enclosed between the first substrate and the second substrate. At least one of the first substrate and the second substrate has a layered structure of a reinforcing layer and one or more layers having a lower strength than that of the reinforcing layer, and at least a portion of the seal member is bonded directly to the reinforcing layer.
US08064026B2
A liquid crystal display device having a liquid crystal display panel includes a first substrate, a second substrate, and liquid crystal interposed between the first and second substrates. The first substrate includes an active element, a first insulating film formed on the active element, a plurality of first electrodes disposed on the first insulating film, a second insulating film disposed on the first electrodes, and a pixel electrode disposed on the second insulating film. The pixel electrode is electrically coupled to the active element via a portion defining a contact hole formed in a portion defining a clearance between the plurality of first electrodes.
US08064023B2
The present invention provides a display apparatus in which destruction of an insulating film by water or water vapor and generation of air bubbles in the display apparatus can be suppressed. The display apparatus includes a display element having a display layer together with a pixel electrode and an opposite electrode, an insulating film in contact with an under face of the pixel electrode and a metal-containing film that contains a metal element, covers an end face of the insulating film, and covers a part of a top face and a part of an under face which continue to the end face of the insulating film.
US08064022B2
A liquid crystal display device includes a liquid crystal display panel which is configured to hold a liquid crystal layer between an array substrate and a counter-substrate. The array substrate includes a pixel electrode which is connected to a switching element, and a counter-electrode which is opposed to the pixel electrode via an interlayer insulation film. The pixel electrode includes a plurality of slits. The slit is formed in a substantially parallelogrammatic shape, and includes, at a corner portion with an acute interior angle, an arcuate recess portion which is recessed toward an outside of an edge.
US08064019B2
To provide: a production method of a liquid crystal display device, the production method being capable of efficiently and stably providing alignment treatment for an alignment film of the liquid crystal display device, in which a plurality of domains is formed in a pixel region; and an exposure device for alignment treatment. A production method of a liquid crystal display device comprising: a first substrate; a second substrate facing to the first substrate; a liquid crystal layer provided between the substrates; a first alignment film provided on the liquid crystal layer side surface of the first substrate; and a second alignment film provided on the liquid crystal layer side surface of the second substrate, wherein the production method comprises subjecting the first alignment film and/or the second alignment film to scanning exposure continuously over a plurality of pixel regions, and the scanning exposure comprises exposing the first alignment film and/or the second alignment film while scanning an inside of each pixel region more than one time in antiparallel directions to form, in the each pixel region, regions for aligning liquid crystal molecules to the surface(s) of the first alignment film and/or the second alignment film in antiparallel directions.
US08064015B2
A transflective display panel includes a first substrate, a plurality of electroluminescent (EL) elements disposed on the first substrate, a plurality of reflectors disposed on the first substrate, a second substrate disposed opposite to the first substrate, a plurality of transparent electrodes disposed on a side of the second substrate opposite to the first substrate, a plurality of color filter layers disposed on a side of the second substrate opposite to the first substrate, and a liquid crystal layer disposed between the first substrate and the second substrate. Accordingly, a problem of insufficient contrast ratio of the transflective display panel can be solved, when the ambient light is too high.
US08064013B2
A liquid crystal display panel 10 of the present invention includes an array substrate 11 with a display region in which a pixel electrode is formed in each of the regions enclosed by a plurality of signal lines and scan lines deployed as matrices, a opposed substrate 12 with a common electrode 31, a sealing agent 35 sealing a peripheral portion of the array substrate 11 and the opposed substrate 12, a liquid crystal layer sealed between both substrates, a border region 34 including a reflector 37 and a transparent electrode 38 is formed on an interlayer 23 at a periphery of the display region of the array substrate 11, and at least a part of an outer peripheral side is lacking from the common electrode 31 at a position corresponding to the border region 34. Thanks to such structure, the border region improves the appearance at the periphery of the display region, and the phenomenon of night vision alongside the scan line wiring does not occur.
US08064009B2
A novel liquid crystal display apparatus is disclosed. The apparatus comprises a liquid crystal cell comprising a pair of substrates which are provided in mutually opposed manner and which has an electrode in at least either thereof, and a liquid crystal material supported between the pair of substrates; a first polarizing film disposed outside the liquid crystal cell; and at least an in-cell optical compensation film disposed between the pair of substrates, with plural domains per a pixel having a different mean alignment direction each other.
US08064004B2
A liquid crystal display apparatus, includes a liquid crystal display panel including a first substrate provided on a display light receiving side, and a second substrate provided on a display light exiting side so as to oppose the first substrate with a liquid crystal material interposed therebetween, the liquid crystal display panel having a bright dot defect portion therein, wherein: the first substrate includes a light-blocking portion formed in a region thereof corresponding to the bright dot defect portion; and the second substrate includes a light-collecting portion formed in a region thereof corresponding to the bright dot defect portion.
US08063991B2
A visible luminance step in a background scene, caused by a signal level mismatch between a matte signal level and a blue backing signal level, is significantly reduced by a soft edge transition region that raises the blue backing signal level up to the signal level of a garbage matte by using a cleanup signal restricted to the transition region. The soft edge formed by cleanup does not make subjects transparent, and actors may enter this zone with little loss of image quality.
US08063990B2
A television production system affords simplification over the automation of a television program such as a news program by making use of State Memory Objects (S-MEMs), each defining one or more operations for execution by one or more production devices. The S-MEMS serve to control one or more actuators on a control panel so that each actuator on the control panel can control different function of different pieces of production equipment depending on the S-MEM selected, and the actuator manifests a status of the production device.
US08063984B2
An integration circuit divides a screen, which is composed of an input video signal, into regions, integrates absolute values of inter-field differences that are included the respective regions, and provides an intra-region integration value SDA. A dynamic range calculation circuit divides the screen into regions and calculates a dynamic range SDR of luminance in each of the regions. If the intra-region integration value SDA is greater than a comparison threshold value FDT and if the dynamic range SDR of luminance in each of the regions is greater than a comparison threshold value DCT, the region is determined to be a subtitle region.
US08063977B2
The arrangement of focus-detecting sensors for autofocus in multipoint range finding and the arrangement of light detection sensors for focus detecting regions are optimized. Further, the chip area and power consumption are reduced. Light detection sensors are provided on the sensor chip in a manner such as to be disposed between focus-detecting sensors provided on the same sensor chip.
US08063976B2
An image pick-up apparatus comprises a filter whose transmitting wavelength band is changed depending on an input drive signal, a spectral control unit for inputting the drive signal to the filter, thereby changing the transmitting wavelength band of the filter in plural steps, a single image pick-up unit disposed at rear side of the filter, for obtaining image data every time the transmitting wavelength band of the filter is changed, and a record control unit for recording plural pieces of image data obtained by the image pick-up unit.
US08063969B2
An image pickup apparatus in which a display surface of a display device can be looked at favorably when imaging a subject and in which it never happens that the display device becomes obstructive during imaging and it is possible to carry out an imaging operation with good stability. The image pickup apparatus includes an imaging device forming a video signal of a subject according to a light inputted from a lens device; a liquid crystal display displaying a video picture, according to the video signal; and an image pickup apparatus body housing the imaging device and having a handle extended approximately parallel with a light axis of a lens system of the lens device. The liquid crystal display is provided integrally or by another member on the front side in the light axis direction of the handle such that the posture thereof can be changed. The display device can be arranged at the most conspicuous position when taking a picture by holding the handle, so that it is possible to improve operationality when taking a picture.
US08063966B2
A solid-state image pickup device includes a voltage supply circuit configured to supply a voltage to load MOS transistors provided to vertical output lines and columnar signal-processing circuits. The voltage supply circuit includes a first amplifier circuit configured to amplify a predetermined voltage supplied to an input part thereof from a voltage generator and to output an amplified voltage to a voltage supply wire, and a sample-and-hold circuit including a sampling switch provided on a path between the voltage generator and the input part and a hold capacitor configured to hold the voltage sampled by the sampling switch.
US08063961B2
Provided is a dual sampling/pixel gain amplifier (CDS/PxGA) circuit with a shared amplifier, and more particularly, to a dual CDS/PxGA circuit for adjusting a gain of an amplifier based on capacitance. The dual CDS/PxGA circuit comprises: a first sampler for sampling a reset level and a data level of a first pixel; a second sampler for sampling a reset level and a data level of a second pixel; and an operational amplifier for receiving sampling values from the first and second samplers, calculating output signals of the first and second pixels using the sampling values, and amplifying the calculated output signals. Thus, it is possible to reduce a speed of an operational amplifier by using the dual CDS/PxGA structure, reduce power consumption by sharing the operational amplifier, and obtain a variable gain of a wide range by adjusting capacitance using a capacitor array.
US08063953B2
In a digital camera, it is checked whether a stored image file belongs to an image file group including a pre-development RAW file and a JPEG file generated by developing the RAW file. When the storage image file belongs to an image file group, an image belonging to the image file group and an image of a single image file not belonging to any image file group are displayed in distinguishable modes in an image selection screen so that a user can select either one of these images. Furthermore, text representing information regarding the image file group or the single image file is displayed, such as information indicating a file type that a displayed image corresponds to, or information including a name of a developing device. As described above, only an image among images of an image file group is displayed, and information regarding the image file is displayed.
US08063951B2
An information processing apparatus has a plurality of recording media, and includes an imaging unit operable to capture an image of a subject, and a recording unit operable to record image data of the captured image onto the recording media such that the amounts of recorded image data differ between the recording media. The same image data is recorded onto at least a first recording medium built in the apparatus and a second recording medium removable from the apparatus such that the amount of data recorded on the first medium is smaller than that recorded on the second medium. In this information processing apparatus, a user can view images captured previously with more ease because image data recorded on the first recording medium is sorted by date and is provided to the user in this state.
US08063941B2
Apparatuses and methods for enhancing a “primary” large format, digital, macro-image with “secondary” image data are provided. The secondary image data is collected utilizing one or more secondary optical systems having at least one electro-optical detector array (e.g., a CCD array) and a specific set of optical mirrors or optical prisms, arranged in such a way that the secondary optical systems extend the angular field-of-view of the primary optical system and the resultant digital image in at least two opposing directions, for instance, in the left and right and/or fore and aft directions. The primary image data and the secondary image data may be distinct and/or may include portions that overlap with one another. Further, the primary image data and the secondary image data may be collected at the same or different resolutions. The collected primary image data and secondary image data are utilized to generate a single output image.
US08063938B2
In order to provide a photographed image process changeover apparatus of a video telephone function which reduces the power consumption by providing only the most optimal functions in accordance with the state of a portable terminal, the comprisal at least includes an image cutout unit 11 for cutting out a predefined zone including a photography target from a photographed image taken by a camera comprised by the portable terminal, a handheld state detection unit 12 for detecting a handheld state, and a changeover unit 13 for changing over between the validity and invalidity of the image cutout unit 11 in accordance with the state of the portable terminal.
US08063929B2
Video communication systems and methods for operating the same are provided. The system has a computer cooperating with at least one image capture device which acquires video images of a local environment having an individual therein, an audio system, an image processor and a communication controller to acquire video images based upon the acquired video images and to cause output video images to a remote individual during the communication event; said computer further providing a contextual interface including an intra-scene analysis algorithm for identifying potential intra-scene transitions during the communication event and a scene capture management algorithm for determining intra-scene adjustments in video capture settings when an intra-scene transition is detected; and the contextual interface further including a transition test with an inter-scene analysis algorithm, for identifying potential inter-scene transitions in the activities of the individuals, and a transition process structure for determining inter-scene adjustments in video capture settings.
US08063922B2
A control circuit changes the ratio of an illumination period to a non-illumination period in a frame period of a backlight according to a gradation level in the one frame period of an image displayed on a liquid crystal panel in such a manner that the higher the gradation level, the backlight illumination control circuit increases the ratio of the illumination period to the non-illumination period in the frame period of the backlight, and the lower the gradation level, the backlight illumination control circuit decreases the ratio of the illumination period to the non-illumination period in the frame period of the backlight and thereby controls illumination intensity toward the liquid crystal panel. A time center of illumination intensity in each one frame period of the backlight is controlled in order that the time center exists in a constant temporal position from the beginning of each frame period.
US08063921B2
In one embodiment of the present invention, data, such as video signal data, for example, for a next desired frame is first modulated or varied to facilitate a transition from a current frame to a next desired frame. A modulation processing section can be used, for example, to thus produce a corrected video signal to facilitate the current-to-next desired grayscale level transition. Thereafter, spatial filtering is then carried on the corrected video signal, using a spatial filtering section for example. As such, high frequency components in a spatial domain may be reduced, even after the spatial frequencies of an ordinary video signal and potentially those of noise have been scaled up. Therefore, undesirable noise-caused display quality degradation can be reduced or even prevented, while pixel response speed as a result of the facilitation of grayscale level transition is increased.
US08063917B2
An object can be deformed in a remarkably short processing time. The image processing system (10) comprises: a first mesh creating section (36) for creating data on such an intermediate triangular mesh that the secondary error metric representative of the difference between an original triangular mesh and a processed intermediate triangular mesh is minimized for a triangular mesh of original shape while allowing rotation and enlargement/contraction thereof according to information about a plurality of handle positions including the points to be fixed and moved in the triangular mesh: and a second mesh creating section (38) for creating the data on such a final triangular mesh that the error metric representative of the difference between the intermediate triangular mesh and the final triangular mesh is minimized while allowing rotation and translation of the intermediate triangular mesh but not allowing uneven distortion, stretching and enlargement/contraction thereof.
US08063914B1
Anti-aliased output based on a scene comprising a plurality of objects may be generated. In one embodiment, a number of samples for an anti-aliasing operation is determined. For each of the samples: each of the objects may be translated in space according to jitter values; the objects may be multiplied by a fractional alpha value for the respective sample; a fractional alpha value stored in a buffer may be modified by a transparency value for each transparent object; and the objects may be rendered to the buffer by blending the objects with existing contents of the buffer. The fractional alpha values may vary from sample to sample. In one embodiment, the plurality of objects comprises one or more opaque objects and one or more transparent objects. In one embodiment, the objects may be rendered directly to a screen buffer.
US08063911B2
A system and method for gamut mapping out-of-gamut signals. A method includes adjusting each color in a color signal, determining a maximum color value of the color signal, in response to a determining that the maximum color value exceeds a maximum displayable color value, scaling color values of colors not having the maximum color value, and setting the color value of the color having the maximum color value to be equal to the maximum displayable color value. The method further includes leaving the color values of the colors in the color signal unchanged in response to a determining that the maximum color value does not exceed the maximum displayable color value. The scaling of color values not equal to the maximum color value results in a maintaining of a proper hue of the color signal, thereby not introducing color artifacts and other forms of color noise.
US08063909B2
Intermediate target(s) are utilized in connection with computer graphics in a computer system. In various embodiments, intermediate memory buffers in video memory are utilized to allow serialized programs from graphics APIs to support algorithms that exceed the instruction limits of procedural shaders for single programs. The intermediate buffers may also allow sharing of data between programs for other purposes as well, and are atomically accessible. The size of the buffers, i.e., the amount of data stored in the intermediate targets, can be variably set for a varying amount of resolution with respect to the graphics data. In this regard, a single program generates intermediate data, which can then be used, and re-used, by an extension of the same program and/or any number of other programs any number of times, enabling considerable flexibility and complexity of shading programs, while maintaining the speed of modern graphics chips.
US08063907B2
A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.
US08063905B2
Animating speech of an avatar representing a participant in a mobile communication including selecting one or more images; selecting a generic animation template; fitting the one or more images with the generic animation template; texture wrapping the one more images over the generic animation template; and displaying the one or more images texture wrapped over the generic animation template. Receiving an audio speech signal; identifying a series of phonemes; and for each phoneme: identifying a new mouth position for the mouth of the generic animation template; altering the mouth position to the new mouth position; texture wrapping a portion of the one or more images corresponding to the altered mouth position; displaying the texture wrapped portion of the one or more images corresponding to the altered mouth position of the mouth of the generic animation template; and playing the portion of the audio speech signal represented by the phoneme.
US08063902B2
For ray tracing, methods, apparatus, and computer readable media provide efficient transmission and/or storage of rays between ray emitters, and an intersection testing resource. Ray emitters, during emission of a plurality of rays, identify a shared attribute of each ray of the plurality, and represent that attribute as shared ray data. The shared ray data, and other ray data sufficient to determine both an origin and a direction for each ray of the plurality, are transmitted. Functionality in the intersection testing resource receives the shared ray data and the other ray data, and interprets the shared ray data and the other ray data to determine an origin and direction for each ray of the plurality, and provides those rays for intersection testing. Rays can be stored in the shared attribute format in the intersection testing resource and data elements representing the rays can be constructed later. Programmable receiving functionality of the intersection testing resource can accommodate many ray types and other situations.
US08063901B2
In response to a request from a client, a server for volume rendering loads a volume dataset from a storage archive, creates a low resolution sub-sampled copy of such volume dataset and transmits it to a client. In response to subsequent requests from the client, the server for volume rendering renders a high quality image of the full resolution volume dataset and renders a low quality image of the sub-sampled copy of the volume dataset, then generates a pixel mask or a hybrid pixel mask indicative of a difference between the high quality image and the low quality image and transmits such pixel mask to the client. The client receives from the server the pixel mask and computes a high quality image based at least in part on the pixel mask and on a selective rendering of its local low resolution sub-sampled copy of the volume dataset.
US08063894B2
An image display system includes: an image data output device that multiplexes and outputs raster data and compressed moving picture data; and an image display device that is connected to the image data output device through a transmission line and displays an image on the basis of image data output from the image data output device. The image display system is capable of displaying a high-quality moving picture on the image display device by reducing the amount of image data flowing through the transmission line without imposing excessive load on the image data output device, the image display device, the image data output device, an image processing program, and a computer-readable recording medium having the image processing program recorded therein.
US08063884B2
An information processing apparatus that allows a display to show a plurality of windows on a same screen is disclosed. The information processing apparatus includes: a detecting means for detecting a signal sent in response to a press of a button allocated on a remote controller; a control means for outputting to an operating system a signal indicating that a first key and a second key provided on a keyboard are pressed and allowing the operating system to switch a representation on the display when the detecting means detects that a first button provided on the remote controller is pressed in accordance with a state of the representation on the display; and a measuring means for measuring a time period from the detection of a signal corresponding to the press of the first button.
US08063881B2
A method and an apparatus for determining displacement of a surface member coupled to a user interface mechanism, for example a joystick handle, using a fixed optical motion sensor. Using the displacement of the surface member, the method, and apparatus may determine an absolute position of the surface member, recalibrating a center point upon detecting a difference in light reflection of the center point.
US08063879B2
A handheld electronic device includes a housing having a surface; a first input component having input members disposed external to the surface; a second touch sensitive input component disposed about the input members, the touch sensitive input component being separate and distinct from the input members and the first input component and being structured to provide one of: a contact point with respect to the surface responsive to actuation of a first number of the input members, and a number of responses responsive to actuation of a second number of the input members. A processor cooperates with the first input component and the touch sensitive input component to determine if a plurality of the input members are actuated contemporaneously and to output a representation of a single one of the input members based upon one of: the contact point, and the number of responses.
US08063870B2
A video processing apparatus and method, the apparatus including: a signal processing part to process an inputted video signal; a display panel to display the processed video signal; a backlight unit that comprises a plurality of light emitting elements that correspond to pixels of the processed video signal and emit light to the display panel; and a controller to calculate a brightness of each of the pixels based on R, G and B component values of each of the pixels, and to control the backlight unit such that the plurality of light emitting elements emit light with intensities corresponding to the calculated brightness of each of the pixels. Thus, aspects of the present invention are capable of improving quality of a video and reducing power consumption.
US08063868B2
A heatsink made of aluminum is provided in a liquid crystal display device. A plurality of light emitting diodes are contacted to a front surface of the heatsink. A fin unit is contacted to a rear surface of the heatsink. In addition, a display panel is supported by a holding member so as to be positioned at a constant distance from the light emitting diodes. The holding member is composed of a front cover and a rear cover of the display panel, supported by the heatsink and a chassis provided between the display panel and the rear cover.
US08063863B2
A picture display apparatus exploiting a liquid crystal display is disclosed. This picture display apparatus (10) includes an interpolator (11), an over-drive unit (12), an angle of visibility improvement unit (13), and a source driver (15) for driving a liquid crystal display panel (16). The interpolator converts the picture rate upwardly. The angle of visibility improvement unit (13) converts an input picture signal into a picture signal representing a grayscale level of the input picture signal by synthesis of liquid crystal transmittances of a plural number of temporally consecutive fields. Specifically, the angle of visibility improvement unit converts the input picture signal to a picture signal made up of a first field set to a signal value related with a high grayscale level and a second field set to a signal value related with a low grayscale level. In case time changes of the grayscale level have occurred in the input picture signal at the same spatial position, the over-drive unit (12) corrects the driving level for a signal value of one or both of the first and second fields depending on response of the liquid crystal.
US08063862B2
A liquid crystal display device includes a display section which enables color display in each of pixels, and a gradation control unit which controls a gradation level in each of the pixels. The display section includes a first white display structure which is configured to combine primary colors and to display white, and a second white display structure which is configured to include a color with a chromaticity different from a chromaticity of the primary color of the first white display structure and to display white. The gradation control unit has a first control mode in which the gradation level of each pixel is controlled by one of the first white display structure and the second white display structure, and a second control mode in which the gradation level of each pixel is controlled by a combination of the first white display structure and the second white display structure.
US08063852B2
A display device according to an embodiment of the present invention includes a pixel driver, first, second, and third light emitting diodes, and first, second, and third switches. The pixel driver outputs a driving current corresponding to a data signal to an output terminal in response to the scan signal. The first, second, and third light emitting diodes emit first, second, and third color lights in response to the driving current respectively. The first, second, and third switches are coupled between the output terminal of the pixel driver and the first, second, and third light emitting diodes respectively. The first, second, and third switches selectively transmit the driving current to the first, second, and third light emitting diodes. Two of light emitting diodes among the first, second, and third light emitting diodes are arranged in a first line, and the remaining one light emitting diode is arranged in a second line different from the first line.
US08063848B2
An X, Ku, and K-band omni-directional antenna with dielectric loading is disclosed. It comprises a conductor with a loading dielectric resonator and a ground plane. Broad frequency coverage from 7.5 to 26 GHz includes uniform azimuthal coverage from +10 to +70 degrees. The antenna can be used generally in microwave communications including Digital Radio Frequency Tags (DRaFTs) communicating with airborne and satellite platforms.
US08063846B2
A semiconductor module includes a multilayer board, a first circuit element mounted on the multilayer board, a second circuit element stacked on the first circuit element, an interposer board, provided between the first circuit element and the second circuit element, which includes an antenna conductor, a passive element, mounted on the multilayer board, which is connected to the antenna conductor, and a molded resin layer which seals the respective elements. The antenna conductor is structured by a spiral-shaped wiring pattern and the both ends of the antenna conductor are connected to the passive element via a bonding wire. The antenna conductor functions as a loop antenna with the passive element inserted.
US08063844B1
An omnidirectional antenna system. Implementations may include an antenna having a wire loop and a single ferrite rod loop. The single ferrite rod loop may be oriented substantially parallel to a plane formed by the wire loop. The single ferrite rod loop may include a plurality of windings and a ferrite rod having a length and two ends. The two ends of the ferrite rod may be substantially centered relative to the wire loop. The plurality of windings may be distributed across a majority of the length of the ferrite rod.
US08063843B2
Antenna structures made of bulk-solidifying amorphous alloys and methods of making antenna structures from such bulk-solidifying amorphous alloys are described. The bulk-solidifying amorphous alloys providing form and shape durability, excellent resistance to chemical and environmental effects, and low-cost net-shape fabrication for the highly intricate antenna shapes.
US08063831B2
An antenna includes: a grounding element extending along a first plane; a radiating element having a first side and extending along a second plane substantially parallel to the first plane, the radiating element being aligned with the grounding element in a normal direction transverse to the first and second planes; a bridging element interconnecting the grounding and radiating elements; and a feeding element extending and tapered from the first side of the radiating element toward the grounding element.
US08063830B2
A planar antenna device is mounted on a board including a dielectric layer and two conductor layers vertically sandwiching the dielectric layer. The upper conductor layer includes a first radiating element having an end portion connected through a via hole to a ground formed by the lower conductor layer, a second radiating element having an open end portion, first and second ground conductors connected to respective base portions of the first and second radiating elements via resistors, and a feeder line configured to feed power to the first and second radiating elements.
US08063827B2
An antenna device usable in a radio apparatus including a printed board includes a ground conductor of the printed board, a first partial element, a second partial element and a parasitic element. The first partial element is shaped into an area having a first side facing a side of the ground conductor and a second side directed to cross the side of the ground conductor, and is provided with a feed portion around a first end of the first side being closer to the second side. The second partial element branches off from the first partial element around one of two ends of the second side being farther from the feed portion, and is directed almost against a direction from the feed portion to a second end of the first side being farther from the second side. The parasitic element has an end grounded around the second end.
US08063823B2
A communication device uses its FGU to generate a location signal that can be used by a reference device to calibrate the communication device and to determine the distance of the communication device from the reference device. The communication device: receives, from a reference device, at least one location signal control parameter that defines pulse shape characteristics for a location signal; configures its FGU based on the at least one location signal control parameter; generates a linear first part of a phase-incoherent location signal having the defined pulse shape characteristics by progressively sweeping an output of the FGU over a range of frequencies from a first frequency to a second frequency within a first time period; and transmits at least one iteration of the first part of the location signal.
US08063818B2
Methods and systems are provided for accessing GPS signals in faded environments. Means are provided for predicting the nonlinear phase induced by the receiver's own clock, when there is at least one GPS satellite link strong enough to calculate a phase profile. In an embodiment, GPS signals are accessed in faded environments by increasing the sensitivity of a GPS receiver by increasing the processing gain of received GPS signals through increased integration time. Matching a near-baseband signal requires removing a nonlinear part of the phase which may arise from several sources, including: the phase drift of the GPS satellite's atomic clock, the phase drift due to the motion of the GPS receiver, the phase drift due to the motion of the GPS satellite, and the phase drift due to the GPS receiver's clock.
US08063815B2
A new method has been developed as an attempt to improve speed and robustness of existing ISAR classification methods. The new method produces a set of silhouettes of possible models in a 3D model database. The set of silhouettes of each model views the model from various viewing angles, as the target dimensions will vary as it is viewed from different angles. The silhouettes are stored as a training set. Classification is done by comparing the silhouette of the target with the set of silhouettes in the training set. The silhouettes are calculated prior to the silhouette matching.
US08063814B1
A beat-product radio imaging method (RIM) system uses a matched continuous wave (CW) transmitter and receiver to electronically image material in between. Signal attenuation measurements are taken from a number of different transmitter and receiver perspectives around the material. The transmitter and receiver each have a crystal oscillator rated at 10-ppm or better frequency uncertainty. The receiver's crystal oscillator is used as a local oscillator to beat down the transmitter's carrier frequency to baseband. The frequency error between the local oscillator and the transmitter carrier frequencies produces a beat product of less than one Hertz in frequency and its magnitude is inversely proportional to the path attenuation between the transmitter and receiver. An extremely low-pass filter is used to remove everything above one Hertz in the detector. The receiver sensitivity is therefore extraordinarily high.
US08063810B2
Apparatus and methods are provided for a voltage-controlled oscillator (VCO) quantization circuit. A quantization circuit comprises an input node for an input signal, a VCO quantizer coupled to the input node, and an output generation module coupled to the VCO quantizer. The VCO quantizer is configured to generate a digital code that is representative of the input signal, wherein the digital code has a first code range. The output generation module generates a digital output value based on the digital code, wherein the digital output value has a second code range being greater than the first code range.
US08063805B1
A voltage regulator uses a digital feedback technique to regulate the voltage at an output of the regulator. The voltage level of an output signal is measured. The voltage level of the output signal is compared to a first reference voltage. A programmable digital control logic block regulates the voltage level of the output signal and operates in a first mode if the voltage level of the output signal is above a first reference voltage and in a second mode if the voltage level of the output signal is below the first reference voltage. Depending on the mode of operation, the programmable digital control logic block provides digital control signals to other elements of the feedback loop.
US08063796B2
A small vehicle detector for determining a size of a vehicle entering a particular area and assigning a rate of charge based on the determined size of vehicle including an entrance for a vehicle to enter the area. The small vehicle detector further includes a vehicle size detector system for determining size of the vehicle. The small vehicle detector also includes a ticket dispenser for dispensing a ticket with the assigned rate of charge based on the size determined by the vehicle size detector.
US08063794B2
A street lamp system includes an illumination device, a display unit and a control module. The display unit is configured for displaying oncoming traffic information. The control module is communicatively coupled to the illumination device and the display unit, for sending a first signal to the display unit for displaying the traffic information, and sending a second signal to the illumination device to increase illumination brightness of the illumination device.
US08063786B2
A method of rectifying drowsiness of a vehicle driver includes capturing a sequence of images of the driver. It is determined, based in the images, whether a head of the driver is tilting away from a vertical orientation in a substantially lateral direction toward a shoulder of the driver. The driver is awakened with sensory stimuli only if it is determined that the head of the driver is tilting away from a vertical orientation in a substantially lateral direction toward a shoulder of the driver.
US08063779B2
A radio frequency identification seal comprises an antenna including a main antenna portion and at least one break-away portion and an RFID tag coupled and tuned to the antenna. The RFID tag outputs a signature in response to a scanning signal when tuned to the antenna.
US08063768B2
Provided is a modem apparatus of power line communication using a power line as a transmission path. The modem apparatus includes: an amplifier for amplifying communication signals and outputting a differential signal obtained from a pair of output signals having a phase difference of 180 degrees therebetween; a signal transformer for applying the amplified communication signals to the power lines; and a balance circuit connected at the primary side of the signal transformer, for enhancing circuit balancing. The balance circuit is constituted by a variable element capable of changing an element value, and there is provided a common mode detecting circuit that detects a common mode current flowing through the secondary side of the signal transformer and that changes the element value of the variable element of the balance circuit such that the detected common mode current becomes small.
US08063765B2
Embodiments disclosed herein provide systems, devices, and methods for detecting the occurrence of consumer abuse events in electronic devices. In one embodiment, a system includes one or more sensors coupled to an abuse detection sub-system for detecting the occurrence of an abuse event, wherein upon detecting an abuse event, a record of the abuse event is stored by the abuse detection sub-system. The system further provides a communication interface configured to provide a first mode of diagnostic communication and a second mode of non-diagnostic communication through a common input/output port. When using a diagnostic device, the diagnostic mode of communication may be enabled, thus allowing the diagnostic device to access consumer abuse event data stored by the abuse detection sub-system.
US08063764B1
A system for detecting and responding to emergency events includes a plurality of local emergency detection and response units positioned in a local area. Each unit includes one or more local sensing agents and a local detection manager. Each local sensing agent is operable to detect emergency events by a change in a given emergency factor in the local area and to convey data representative of the change in the emergency factor to a detection manager which is operable to receive the data and to assign a value to the emergency factor according to the data. A central location controller unit and/or the local emergency detection and response unit are operable for classifying the assigned value of the emergency function to form an assigned value classification and for initiating the local emergency event response agent to implement a response protocol according to the assigned value classification.
US08063763B2
A monitoring system for a NAC (Notification Appliance Circuit) is provided. The monitoring system includes a system controller, and a NAC comprised of one or more notification appliances that may be in a series. The NAC and its appliances may be operatively coupled to the system controller. The system controller is operable to determine whether a notification appliance has sufficient voltage at a low voltage operation. The system controller may control the voltage to the NAC in order to provide power to simulate operation of the NAC using battery power. A voltage may be measured during the simulation (such as at one end of the NAC). The measured voltage may be compared with a predetermined minimum operating voltage for the notification appliance. Based on the comparison, it may be determined whether the one or more appliances on the NAC may operate properly when the NAC is operated using battery power.
US08063762B2
A system for monitoring and reporting of alarm events occurring in a monitored system includes a power supply, a switch module, an alarm interface, an event message module and a system controller wherein the switch module provides active power to the event message module, the wireless communication module and the system controller only when an alarm event is detected.
US08063743B2
A method of testing an electronic tag includes: embedding the electronic tag within an elongate carrier strip composed of a material having material properties simulating an end product material within which the tag resides embedded during end product use; positioning the embedded tag substantially within the carrier strip at a mid-portion between opposite end portions of the strip; positioning the mid-portion of the strip and the embedded tag over at least one curved support surface; engaging the end portions of the strip; and positioning a reader in a position operative to receive information from the electronic tag during a testing transmission sequence; reciprocally moving the strip mid-portion in a forward direction and a reverse direction over the curved support surface; and rendering the reader operational to receive information transmitted from the electronic tag as the strip mid-portion reciprocally moves in the forward and reverse directions.
US08063742B2
A testing apparatus includes an elongate carrier strip encapsulating an electronic device such as an RFID tag therein. The apparatus includes multiple rollers positioned in sequence and defining a serpentine path for receiving and supporting a carrier strip mid-portion. A drive mechanism engages the end portions of the strip and reciprocally moves the strip mid-portion in a forward direction and a reverse direction against curved surfaces of the rollers. A reader is further provided and positioned to detect the presence or absence of transmission error by the electronic device as the strip mid-portion reciprocally moves in the forward and reverse directions over the apparatus support surface during a testing sequence.
US08063741B2
This disclosure discloses a tag label producing apparatus comprising: a printing device; a transmitting/receiving device that performs information transmission/reception; a feeding device that feeds said tag medium; a coordination control portion; a communication determining portion that determines whether or not information transmission/reception has succeeded; and a decision portion that decides a feeding-stop condition for stopping feeding based on a feeding condition for the transmission/reception, and a feeding-condition for printing to a print area; wherein: said coordination control portion controls in coordination operations of said feeding device, said transmitting/receiving device, and said printing device so as to stop feeding based on said feeding-stop condition decided by said decision portion and to perform retry of said information transmission/reception when said communication determining portion determines that said information transmission/reception has failed.
US08063739B2
An active security tag is embedded within the digital logic of an electronic design for logic destined for an integrated circuit such as an FPGA. The security tag includes security tag data which permits identification of the electronic design, and facilitates efforts to enforce copyrights in the designs. The security tag also includes a transmitter designed to covertly transmit security tag data to a receiver. Other information, such as error information and status information about the integrated circuit may also be transmitted. The transmitted information is concealed from detection by being hidden within background noise signals or other signals created by normal usage of the integrated circuit.
US08063728B2
An inductive component includes a closed magnetic core and a first conductor that runs at least twice through the interior of magnetic core. The first conductor is a solid conductor that includes several U-shaped pre-bent parts that are tightly connected to one another. The U-shaped pre-bent parts may be each be flat conductors. Flat sections of the flat conductors may run in planes oriented transversely to one another.
US08063727B2
Devices and methods for reducing stray magnetic fields from an inductor are disclosed. In some aspects, a device includes a substantially U-shaped component configured to attach to a conductive surface of a printed circuit board and configured to substantially surround a lengthwise portion of an inductor on three sides of the inductor.
US08063722B2
A balance filter includes two acoustic wave filters connected between a single unbalanced terminal and two balanced terminals, and a ground terminal connected to the two acoustic wave filters via a first interconnection portion and a second interconnection portion. The first interconnection portion is connected to the two acoustic wave filters, and the second interconnection portion is connected to the first interconnection portion in a region that is located between the two acoustic wave filters and extends in a direction orthogonal to a direction in which the two acoustic wave filters are aligned.
US08063717B2
A duplexer interfacing a receiver and a transmitter with an antenna includes first and second filters. The first filter includes at least four first series resonators, four first shunt resonators respectively connected between the four first series resonators and ground voltage, and a mutual inductance commonly connected between two adjacent first shunt resonators. The second filter includes at least four second series resonators, four second shunt resonators respectively connected between the four second series resonators and the ground voltage, and a cross-coupling capacitor connected between a first capacitor node connected to at least one of the second series resonators and a second capacitor node connected to one of the second shunt resonators, and an inductor connected in series between second capacitor node and ground. Three of the second series resonators and the second shunt resonator to which the cross-coupling capacitor is connected are between the first and second capacitor nodes.
US08063714B2
A tunable RF filter comprises a signal transmission path having an input and output, a plurality of resonant elements disposed along the signal transmission path between the input and output, and a set of non-resonant elements coupling the resonant elements together to form a stop band having a plurality of transmission zeroes corresponding to respective frequencies of the resonant elements, and at least one sub-band between the transmission zeroes. The set of non-resonant elements comprises a first plurality of non-resonant elements respectively coupled in parallel with the resonant elements, and a second plurality of non-resonant elements respectively coupled in series with the resonant elements. The first plurality of non-resonant elements comprises at least one variable non-resonant element for selectively introducing at least one reflection zero within the stop band to create a pass band in one of the one sub-band(s) without varying any of the second plurality of non-resonant elements.
US08063713B2
Designs and techniques for transmitting electrical signals via transmission lines on integrated circuits without distortion and at the speed of light. In one implementation, one or more leakage resistors are connected between the two conductor wires of a transmission line.
US08063712B2
Methods and systems for VCO impedance control to optimize performance, efficiency, and power consumption are disclosed and may include selectively coupling one of a plurality of taps on a multi-tap inductive load to a voltage controlled oscillator (VCO) on a chip comprising a plurality of transmitters and receivers. The multi-tap inductive load may comprise a multi-tap transformer or transmission line, which may be integrated on the chip, or may be integrated on a package to which the chip is coupled. A voltage swing at an output of the VCO and/or a current in the VCO may be adjusted by configuring a load of the VCO utilizing the multi-tap inductive load. The multi-tap inductive load may be coupled to the VCO utilizing one or more CMOS switches.
US08063708B2
A phase locked loop can reduce a locking time, thereby efficiently reducing power in a locking operation. The phase locked loop includes a phase detector, a control voltage generator, a voltage controlled oscillator and a start-up driver. The phase detector detects a phase difference between a reference clock and a feedback clock to generate a detection signal corresponding to the detected phase difference. The control voltage generator generates a control voltage having a voltage level corresponding to the detection signal. The voltage controlled oscillator generates an internal clock having a frequency corresponding to a voltage level of the control voltage. The start-up driver drives a control voltage terminal to a predefined start-up level in response to a start-up level multiplex signal corresponding to a frequency of the reference clock prior to activation of the voltage controlled oscillator.
US08063707B2
Phase locked loop circuits capable of increasing an equivalent capacitance thereof to improve stability are provided, in which an integral part comprises a first phase frequency detector providing a phase error signal, a first charge pump circuit generating a control signal according to the phase error signal, a controllable oscillator providing an output clock according to the control signal, and a sampling adjustment unit decreasing the number of times the control signal is updated according to the phase error signal. A proportional part is coupled between the controllable oscillator and a reference clock and operated in a fraction mode.
US08063706B2
A Radio Frequency (RF) cascode power amplifier operates with differing battery supply voltages. A transconductance stage has a transistor with an RF signal input at its gate. A cascode stage has at least one cascode transistor, the cascode stage coupled in series with the transconductance stage between a battery voltage node and ground, the cascode stage having an RF signal output at the battery voltage node and at least one bias input to the at least one cascode transistor. Cascode bias feedback circuitry applies fixed bias voltage(s) to the at least one two bias inputs for a low battery voltage and applies feedback bias voltage(s) to the at least two bias inputs for a high battery voltage, the feedback bias voltage(s) based upon a voltage of the battery voltage node. More than two differing battery supply voltages are supported.
US08063703B2
An output circuit including a fine-adjustment VGA and a rough-adjustment VGA, where the maximum gain of the fine-adjustment VGA, as attained when the minimum gain of the rough-adjustment VGA is attained, is lower than the maximum gain of the fine-adjustment VGA as attained when the maximum gain of the rough-adjustment VGA is attained, so that the power consumption of the rough-adjustment VGA is reduced.
US08063699B2
Presently many audio chips suffer from pop issues, which is especially serious for single ended audio drivers. An audio pop is a disturbance in the output caused by a sudden transition of chip power, particularly when a chip is powered on or powered off. Furthermore, compensation networks included in the amplifiers on audio chips for stability offer a significant path for transmitting power disturbances to the output. Hence, circuitry is developed to suppress pops in the output stages of an amplifier.
US08063697B2
A self-oscillating driver circuit comprises a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path comprises a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range.
US08063694B2
A bus loop power interface (100) is provided according to the invention. The bus loop power interface (100) comprises a voltage control module (110) receiving a loop voltage VLOOP and generating a predetermined supply voltage VSUPPLY, an impedance control module (120) coupled to the voltage control module (110), with the impedance control module (120) receiving a loop current ILOOP and generating a predetermined supply current ISUPPLY, and a feedback (115) coupled between the voltage control module (110) and the impedance control module (120). The feedback (115) provides a feedback signal to the voltage control module (110) that enables the voltage control module (110) to substantially maintain the predetermined supply voltage VSUPPLY.
US08063688B2
This invention is a clamp circuit for a video input. The clamp circuit includes: a coupling capacitor; a differential amplifier comparing a video input to predetermined reference voltage; a clamp transistor having a gate connected to the output terminal of the differential amplifier and a source-drain path connected between a power supply voltage and a second terminal; a resistive element connecting the second terminal of the clamp transistor and the coupling capacitor; a first current sink carrying a first predetermined current from the coupling capacitor to ground; and a second current sink carrying a second predetermined current from the second terminal of the said clamp transistor to ground. The resistive element can be a transistor, a resistor, a diode or a switch.
US08063687B2
An analog delay element for delaying an input clock signal to produce an output clock signal. The analog delay element includes a delay circuit for receiving the input clock signal and for providing an intermediate clock signal in response to a first bias voltage. A current mirror amplifier generates a first current in a first current branch in response to the intermediate clock signal, and generates a second current in a second current branch in response to the first current and a second bias voltage. The second current branch has an output node for providing the output clock signal having a logic level corresponding to the delayed intermediate clock signal logic level.
US08063686B1
In one embodiment of the invention, a method is disclosed to generate a clock output signal with selected phase. The method includes selecting a phase delay for the clock output signal; charging a capacitor with a first weighted current during a first phase input clock, charging the capacitor with a second weighted current during a portion of a second phase input clock, and determining if a voltage across the capacitor is greater than or equal to a threshold voltage to generate a first edge of the clock output signal with the selected phase delay. The first weighted current may have a weighting of N out of M to charge the capacitor with a predetermined rate of change in voltage in response to the selected phase delay. The second weighted current may have a weighting of M out of M to charge the capacitor with a constant rate of change.
US08063680B2
A delay locked loop circuit includes: a delay locked loop block receiving an external clock and generating a delay locked internal clock; a duty cycle correcting block connected to the delay locked loop block and correcting the duty cycle of the internal clock; and an error detecting unit comparing the voltages of first and second pumping output nodes of the duty cycle correcting block to detect an operation error of the duty cycle correcting block.
US08063679B2
Jitter is stably reduced. An input clock signal (CLKi) is outputted as an output clock signal (CLKo) via a voltage controlled delay circuit (12), and in addition a delay amount in the voltage controlled delay circuit (12) is controlled based on a result of a phase comparison of the input clock signal (CLKi) and the output clock signal (CLKo). A phase comparison result judging circuit (15) adds up results of phase comparison of the input clock signal (CLKi) and the output clock signal (CLKo) over a prescribed time, and controls the delay amount based on a distribution of addition results.
US08063677B2
A phase locked loop includes a phase lock unit configured to compare a phase of a reference clock with a phase of a feedback clock and to generate an internal clock based on the comparison; a delay lock unit configured to compare the reference clock with the internal clock, and to generate the feedback clock which is delayed in response to a control voltage based on the comparison; and a start voltage enable unit configured to receive an enable signal and to apply a start voltage as the control voltage in response to the enable signal.
US08063669B2
Described is an apparatus that includes a frequency source and a plurality of time domain direct digital synthesizers each having an input connected to an output of the frequency source and an output providing an output frequency signal. A particular time domain direct digital synthesizer includes a sigma-delta modulator that functions as a second order multi-stage noise shaping sigma-delta modulator. In one exemplary embodiment sigma-delta modulator outputs provide a unitary-weighted word used to switch certain unit capacitors that comprise part of a delay modulator to produce a time-varying delay having a time-averaged value that directly corresponds to a binary value appearing on a plurality of phase accumulator outputs.
US08063661B2
To include a plurality of circuit blocks each including a plurality of nonvolatile memory elements arranged in the X direction, a plurality of comparing circuits that are respectively allocated to the nonvolatile memory elements, and a determining circuit that is commonly allocated to the comparing circuits. The nonvolatile memory elements included in a predetermined circuit block among the circuit blocks are arranged in a first area. The comparing circuits and the determining circuit included in the predetermined circuit block are arranged side by side in the X direction in a second area that is located in the Y direction with respect to the first area. With this arrangement, because the circuit block becomes a shaped block, even when a plurality of circuit blocks are repeatedly arranged, it is possible to realize a further reduction of the chip area.
US08063650B2
Methods, systems, and apparatus for testing semiconductor devices. A semiconductor device includes one or more external terminals configured to receive fuse configuration data from an external source. The semiconductor device also includes a soft-blow circuit to generate a soft-blow signal based on the fuse configuration data, and a fuse circuit that includes a fuse and has first and second operational states corresponding to the fuse being intact and blown, respectively. The fuse circuit is configured to receive the soft-blow signal and to select its operational state to be the first or second operational state based on the received soft-blow signal.
US08063647B2
A testing apparatus includes a relay and a connector. The relay includes a coil, first and second single-pole double-throw (SPDT) switches. The first and the second SPDT switches include first and second contacts. The connector includes first and second hard disk drive (HDD) indicator pins, and first and second switch pins. The first contact of the first SPDT switch is grounded. The first contact of the second SPDT switch is connected to the power source. The first HDD indicator pin is connected to a power source. The second HDD indicator pin is connected to the second contact of the first SPDT switch and the second contact of the second SPDT switch. The first switch pin is connected to the power source. The second switch pin is grounded via the coil.
US08063646B2
Microelectronic devices, methods for testing microelectronic devices, and detachable electrical components. One embodiment of an apparatus for testing microelectronic devices in accordance with the invention comprises a board having a primary side, a secondary side, a plurality of test sites at the primary side, and electrical lines electrically coupled to the test sites. The testing apparatus can further include a plurality of lead holes in the board. Individual lead holes have a sidewall and a conductive section plated onto the sidewall. In several embodiments, individual pairs of first and second lead holes are electrically coupled to electrical lines corresponding to an associated test site. The apparatus can further include a plurality of permanent fuses fixed to the board. Individual permanent fuses are electrically coupled to electrical lines associated with an individual test site and an individual pair of first and second lead holes. The testing apparatus can further include a replacement fuse mounted to an individual pair of first and second lead holes at a test site having a blown permanent fuse. The replacement fuse has a first lead with a press-fit member engaged directly with the plated section in the first lead hole. The replacement fuse further includes a second lead engaged with the second lead hole and a fuse element connected in series with the first and second leads.
US08063640B2
A method for measuring an sample in an NMR spectrometer uses a coupling configuration (1; 30) comprising a coupling element (3) and a supply capillary (2), wherein the coupling element (3) has a funnel-shaped section (5) which clamps an end (6) of the supply capillary (2). An envelope capillary (10) is provided into which the supply capillary (2) is inserted, wherein the end (6) of the supply capillary (2) projects past an end (11) of the envelope capillary (10), and the end (11) of the envelope capillary (10) is also clamped in the funnel-shaped section (5).
US08063637B2
Techniques for designing RF pulses may be configured to produce improved magnitude profiles of the resulting magnetization by relaxing the phase constraint and optimizing the phase profiles. In one embodiment, a spinor-based, optimal control, optimal phase technique may be used to design arbitrary-tip-angle (e.g., large and small tip angle) RF pulses (both parallel transmission and single channel). In another embodiment, small tip angle RF pulses (both parallel transmission and single channel) may be designed using a small-tip-angle (STA) pulse design without phase constraint that is formulated as a parameter optimization problem.
US08063626B2
The present invention refers to a method for the precise measurement of dependency on amplitude and phase of a plurality of high frequency signals, preferably in the synchrotron accelerator of elementary particles. The essence of the solution according to the invention lies in that with a single measuring device and without any aliasing it is achieved a resolution of 0.2 micron and repeatability of measurements of 1 micron down to the lower frequency limit of a few MHz. A method according to the invention includes alternately directing, with a radio frequency (RF) switch, each analogue input signal to each of a plurality of RF processing units; amplifying each analogue input signal in each RF processing unit in order to adjust signals to the measuring range of a plurality of analog-digital (A/D) converters; directing each amplified analogue input signal to each of a plurality of A/D converters; converting the analogue signals to digital signals; directing the digital signals to a digital corrector; correcting the digital signals by means of correcting signals from the inverse models of evaluated systematic errors; collecting corrected digital signals in a digital switch and directing the ordered recombined number of digital signals to each of a plurality of digital receivers; and filtering the recombined number of digital signals in a plurality of low-pass filters.
US08063625B2
A circuit or apparatus for providing intermittent or interruptible power to an electronic device. The circuit may provide power upon user initiation and interrupt that power in response to a user command, fault state, period of inactivity and so forth. As one example, interruptible power may be initially provided to activate or “power up” an electronic device and constant power provided after the initial activation. The initial powering up of the device may be facilitated by closing two contacts. The circuit may continue to provide power after the button is released through a monitoring and/or feedback mechanism.
US08063624B2
A method and apparatus are described for providing a current mirror type high voltage switching circuit (60) having a reference branch (M2, M3, R1) and a tracking branch (M1, M5), where the output peak current is limited by adding an additional branch (M4, M6) to the current mirror circuit which includes an additional mirror transistor (M4) and cascode transistor (M6), and where over voltage protection is provided by including a shut-off circuit (Q1, Q2) which turns “OFF” the cascode transistors (M5-M8) whenever the output voltage (Vout) exceeds the first reference voltage (Vbat) by a predetermined amount.
US08063623B2
The present disclosure relates to a compensation circuit for providing compensation over PVT variations within an integrated circuit. Using a low voltage reference current source, the compensation circuit generates directly, from an on-chip reference low voltage supply (VDD), a reference current (Iref) that is constant over PVT variations, whereas a detection current (Iz) that is variable over PVT variations is generated by a sensing circuit, which is based on a current conveyor, from a low voltage supply (VDDE−VDD) applied across a single diode-connected transistor (M10) corresponding to a voltage difference between two reference low voltage supplies. Both currents (Iref, Iz) are then compared inside a current mode analog-to-digital converter that outputs a plurality of digital bits. These digital bits can be subsequently used to compensate for PVT variations in an I/O buffer circuit.
US08063621B2
A multi-phase power converter and a method for balancing a plurality of currents in the multi-phase power converter. The multi-phase power converter that includes a pulse width modulator coupled to an oscillator. A plurality of currents are generated in response to output signals from the pulse width modulator. The levels of the currents are sensed and a sense signal is transmitted to the pulse width modulator. Switching circuitry within the pulse width modulator switches signals from the oscillator in accordance with the current levels, the levels of the signals from the oscillator, and whether at least one of the signals from the oscillator is either rising or falling.
US08063619B2
Power is supplied to an information handling system chipset with a single voltage regulator having dual phases. A first phase of the voltage regulator provides power to a low power state power rail in an independent mode to support a low power state, such as a suspend or hibernate state. A second phase of the voltage regulator provides power to a run power state power rail in combination with the first phase by activation of a switch, such as a MOSFET load switch, that connects the low power state power rail and the run power state power rail. Voltage sensed from both power rails is applied to control voltage output so that the run power state power rail is maintained within more precise constraints than the low power state power rail.
US08063616B2
One disclosed embodiment is a power conversion circuit including a power conversion bridge between a bus voltage and ground, including a switched node for supplying current to an output circuit. A driver section is configured to drive the power conversion bridge that includes a first section and a second section, the first section being between a negative supply voltage and ground, and the second section being between the switched node and a derived voltage below the switched node, the derived voltage being derived from the negative voltage. In one embodiment, the power conversion bridge includes a high side III-nitride switch and a low side III-nitride switch connected with the high side III-nitride switch to from a half-bridge. In one embodiment, the high side and low side III-nitride switches are depletion mode devices.
US08063610B2
A multi-power charger comprises an internal battery, receptacles for connecting one or more external power sources, and output receptacles for connecting to an electronic device. A voltage selection circuit determines an operating voltage of the first device and selects a power supply source to supply the operating voltage the device. The power supply source may be the internal battery, one of the external power sources, or both. The operating voltage is delivered to the device via the output receptacle.
US08063609B2
Methods and systems are provided for controlling a power transfer rate in to and/or out of a vehicle energy storage device to affect a current state of charge of the energy storage device. The vehicle may be on a mission comprising a plurality of future power transfer opportunities. In one example, the method comprises adjusting the power transfer rate based on an estimated duration of a future power transfer opportunity. Further, the method may include, if the estimated duration of the future power transfer opportunity is different from a predetermined threshold, changing the power transfer rate at the future power transfer opportunity. The method allows the operating life of the energy storage device to be extended.
US08063607B2
A lighting system is provided that includes at least one lighting device, at least one connector, and a plurality of external power sources. The external power sources are adapted to be electrically connected to the lighting device by the connector. One of the external power sources is an energy storage system having a plurality of battery cells. A first charging method is utilized when a voltage potential of first and second battery cells is less than a voltage potential threshold, a second charging method is utilized when the voltage potential of the first and second battery cells is equal to or greater than the voltage potential threshold, and the first charging method is utilized to charge the first battery cell prior to charging the second battery cell when the first battery cell voltage potential is below the voltage potential threshold and greater than the second battery cell voltage potential.
US08063606B2
A battery charger includes a power source for supplying a primary charge current to a first battery, and a charge manager for charging a second battery. The charge manager is coupled to the power source and is configured to charge the second battery with a secondary charge current in accordance with a continuous comparison between a predefined maximum current limit and a total current drawn from the power source.
US08063604B2
In one embodiment, a system comprises: a renewable energy generator; a renewable energy availability server connected to the renewable energy generator, wherein the renewable energy server is connected to an electric grid and a network, the renewable energy availability server is configured to transmit a right to recharge certificate; a rechargeable device containing a recharge controller, wherein the recharge controller is connected to the electrical grid, the recharge controller configured to receive upon request the right to recharge certificate; and the recharge controller being further capable of enabling charging of the rechargeable device based on the right to recharge certificate.
US08063601B2
A motor driving circuit for adjusting speed of the motor by changing output voltage is disclosed. One end of the motor is coupled to a variable voltage source. The motor driving circuit includes a motor-driving unit, a control unit and a determining unit. The motor-driving unit includes a first end coupled to another end of the motor, a second end coupled to a ground and a third end, and is utilized for driving the motor. The control unit is utilized for controlling the voltage between the first end and the third end of the motor-driving unit. The determining unit is coupled between the variable voltage source and the control unit, and is utilized for controlling the control unit to adjust the voltage between the first end and the third end of the motor-driving unit according to magnitude of the voltage of the variable voltage source.
US08063599B2
A motor control device includes a rotation speed control circuit, a voltage transforming circuit, a buffering circuit and a driving circuit. The rotation speed control circuit provides a rotation speed control signal. The voltage transforming circuit is electrically connected to the rotation speed control circuit and transforms the rotation speed control signal to a speed control voltage signal. The buffering circuit, electrically connected to the voltage transforming circuit, receives the speed control voltage signal and delays or buffers output of the speed control voltage signal. The driving circuit, electrically connected to the buffering circuit, receives the speed control voltage signal from the buffering circuit and generates a driving signal according to the speed control voltage signal so as to control the operation of the motor.
US08063597B2
An electric circuit for supplying power to a DC application is disclosed. The electric circuit comprises a DC power source (1) connectable to an alternator charging circuit (2), an FET (T7), and a capacitor (8) connected across the gate terminal and the source terminal of the FET (T7). The drain terminal of the FET (T7) is connected to a negative terminal of the DC source (1). The FET (T7) protects the circuit against accidental connection of the alternator charging circuit (2) to the DC power source (1) with reversed polarity, by opening a switch (6) of the FET (T7) when this occurs. The capacitor (8) protects the FET (T7) from being pushed into avalanche in case a load-dump transient occurs. This is because the capacitor (8) in this case will charge and discharge, thereby introducing a time delay before the switch (6) is opened. Protection against load-dump transients is thereby obtained by means of a small component with low energy dissipation. Thereby the size of the circuit is reduced and energy is conserved.
US08063593B2
An interface cord is operable to connect an external controller to an electrical machine. The interface cord includes a first connector having a first pin configuration, a cable coupled to the first connector, a second connector coupled to the cable and having a second pin configuration different from the first pin configuration, and a circuit board with a programmable electrically coupled in circuit between the first connector and the second connector.
US08063592B2
A door system includes a support connected to a structure, and a door mounted on the support and movable relative to the support between an opened position and a closed position. The door includes a detection device and a remote module coupled to the detection device. The remote module includes a battery and an RF module for supporting two-way communication and sending signals indicative of the status of the detection device and the battery. The door system also includes a motor to drive the door, and a controller to control the motor. The controller includes a user interface and a memory. The door system also includes a base module coupled to the controller for receiving signals from the remote module. The received signals are indicative of the status of the detection device and the battery. The base module also sends signals related to successful transmission acknowledgements to the remote module.
US08063588B1
A circuit uses a single control input to an oscillator of an electronic ballast to program the parameters of soft-start frequency, pre-heat frequency, ignition ramp time, and ballast run frequency. The output frequency of the oscillator is based on an electrical parameter at the control input node. A resistor-capacitor network may be used to program the soft-start ramp time and ignition ramp time. The resistive element of the restive-capacitance network may be used to program the pre-heat frequency. A switchable impedance may be used to program the ballast run frequency. A look-up table circuit may also be used in the alternative to implement a single control input for the oscillator of an electronic ballast.
US08063584B2
A light output device includes a feedback-signal generating unit configured to generate a feedback control signal for maintaining output power of the light at a predetermined value. The feedback-signal generating unit generates the feedback control signal in a gradually rising manner and supplies the generated feedback control signal to the output unit so that output power of the light is gradually increased at a time of power-on. The light output device also includes a discharge circuit configured to discharge a charge stored in the feedback-signal generating unit and thereby accelerate decrease of the feedback control signal and a power-voltage monitoring circuit configured to monitor a voltage of the power supplied to the output unit. The power-voltage monitoring circuit, upon detecting shutdown of the power, controls the discharge circuit and thereby causes discharge of the charge stored in the feedback-signal generating unit.
US08063582B2
The present invention transfers AC electric power to mutually series connected resistive impedance components, inductive impedance or capacitive impedance to divide the voltage of the power source, whereby the divided power of each impedance is rectified by the rectifier device to be the uni-directional DV power for driving the unidirectional light emitting diode.
US08063580B2
A pair of magnetically coupled inductors forms a current-compensated choke arrangement for reducing electromagnetic disturbances and for weakening the effects of glitch pulses during the ignition of a high-pressure discharge lamp. To further reduce these disturbances and glitch pulses, a resistor having a resistance value that is based on the impedance of the inductors within a given frequency range is arranged in series between a voltage source and the ignition device of the high-pressure discharge lamp. A filter capacitor across the input side of the current-compensated choke also further reduces these disturbances and glitch pulses.
US08063574B2
An exemplary light emitting diode illuminating device includes a light emitting diode (LED) light source, a heat dissipating device, a temperature detector, a power supply and a pulse width modulator. The heat dissipating device is thermally connected to the LED light source. The temperature detector is thermally connected to the LED light source and configured for detecting the working temperature of the LED light source. The power supply is electrically connected to the pulse width modulator for providing electric power to the pulse width modulator. The pulse width modulator has a direct current (DC) output mode and a pulse output mode.
US08063566B2
An object of the present invention is to provide an illumination apparatus which includes an illumination fixture having an open-type reflector and a metal halide lamp, and can suppress a decrease in intensity and occurrence of glare. The illumination apparatus includes a metal halide lamp and an illumination fixture. The metal halide lamp includes an arc tube which has therein a pair of electrodes, an inner tube which houses the arc tube and has a pinch seal part at one end, and an outer tube which houses the inner tube and has a base at one end. The illumination fixture includes a reflector having a concave reflecting surface, a socket, and an attachment. In the inner tube, a diffusing part which diffuses light emitted from the arc tube is formed in an area closer to a lower end of the inner tube than a center between the pair of electrodes.
US08063565B2
A lamp and methods of forming are shown. In one example, a dielectric layer is formed over a gap between conductors in a plasma lamp. Electric arcing is reduced or eliminated, thus allowing tighter gaps and/or higher voltages. In one example a glass frit method is used to apply the dielectric layer. A lamp is shown with a barrier layer that prevents tarnish such as tarnish from sulfur exposure. The barrier layer reduces or prevents degradation of the lamp due to conversion of a conductor material to non-conductive tarnish material.
US08063563B2
A plasma display panel includes a front panel having a dielectric layer. The dielectric layer of the front panel includes a first dielectric layer and a second dielectric layer disposed on the first dielectric layer. The gas permeability of the second dielectric layer is in the range of 0% to 1%. The second dielectric layer may be formed by heating the surface of the first dielectric layer to thermally metamorphose or transubstantiate the first dielectric layer to a limited depth from the surface the first dielectric layer.
US08063560B2
A hermetically sealed glass package and method for manufacturing the hermetically sealed glass package are described herein using an OLED display as an example. Basically, the hermetically sealed OLED display is manufactured by providing a first substrate plate and a second substrate plate and depositing a frit onto the second substrate plate. OLEDs are deposited on the first substrate plate. An irradiation source (e.g., laser, infrared light) is then used to heat the frit which melts and forms a hermetic seal that connects the first substrate plate to the second substrate plate and also protects the OLEDs. The frit is glass that was doped with at least one transition metal and possibly a CTE lowering filler such that when the irradiation source heats the frit, it softens and forms a bond. This enables the frit to melt and form the hermetic seal while avoiding thermal damage to the OLEDs.
US08063558B2
Provided is an organic light-emitting device having little apparent deterioration of a durable luminance. The organic light-emitting device includes a hole transport layer and a light-emitting layer which are located in a predetermined order between a reflection electrode for reflecting light and an electrode for transmitting light, the hole transport layer being in contact with the reflection electrode and made of an organic compound, and the light-emitting layer being made of an organic compound, wherein an optical film thickness L of the hole transport layer is set in a range of 0.25λ×(2n −1.7) to 0.25λ×(2n−1.3), where λ indicates an emission wavelength and n indicates a positive integer.
US08063557B2
A light-emitting device comprising a substrate, a light-emitting stack, and a transparent adhesive layer having wavelength-converting materials embedded therein formed within the light-emitting device is provided.
US08063551B1
In the fabrication of a display, such as an OLED display, the OLED layer stack is deposited on an electrode on the substrate. The electrode may be the anode and may comprise indium tin oxide (ITO). Desirably, the deposited films are of uniform thickness over the entire active area of the electrode. If the films are not uniform, then areas that are thicker will not emit light, and areas that are too thin may emit light in a less than optimum efficient way (power loss) and/or result in leakage current leaks through the device in a way that does not generate photons. An active-matrix organic light emitting diode comprises a substrate with a larger well size or wider channel width compared to the emission area. This improves the effective aperture ratio, which improves pixel intensity homogeneity.
US08063546B2
A vibratory structure includes: a first X-cut crystal substrate; a second X-cut crystal substrate stacked on the first X-cut crystal substrate so that the x-axis of the second X-cut crystal substrate is parallel to the x-axis of the first X-cut crystal substrate; a base formed by the first X-cut crystal substrate and the second X-cut crystal substrate; and vibratory arm sections formed so as to be integrated together with the base in one body, and protruding from the base.
US08063542B2
Devices are disclosed that include a piezoelectric vibrating piece; a glass base and lid form a package enclosing the piezoelectric vibrating piece. The piece has first and second electrodes. The base has first and second opposing surfaces. The base mounts the piezoelectric vibrating piece, and the lid seals the piezoelectric vibrating piece in the package. The base includes first and second metal wires, extending therethrough, whose ends are denuded to the first and second surfaces and connected to the first and second electrodes, respectively. In disclosed methods for making the packaged devices, such as piezoelectric oscillators, multiple packaged devices are made simultaneously by stacking and simultaneously bonding respective wafers on which glass bases, piezoelectric vibrating pieces, and lids have been formed.
US08063536B2
An optical apparatus includes a vibrated member and a piezoelectric element. The piezoelectric element vibrates the vibrated member at a predetermined vibration mode to remove a foreign substance adhered to a surface of the vibrated member. A drive electrode, a first vibration detection electrode and a second vibration detection electrode are provided on a first face of the piezoelectric element, and a ground electrode is provided on a second face of the piezoelectric element. The first vibration detection electrode and the second vibration detection electrode have an axis-symmetrical shape, and are arranged on the first face of piezoelectric element so as to be symmetrical with respect to an axis along which a predetermined vibration node occurs when the vibrated member vibrates at the predetermined vibration mode.
US08063532B2
Disclosed is a motor of spring charging device in air circuit breaker wherein first and second frames are formed with glass fiber-added plastic material to facilitate the tight-fitting of a bearing and a manufacturing cost of driving motor is reduced by removing a brush holder isolator which was an essential part for isolating the brush holder, and a brush holder and a brush holder insertion hole of the first frame for inserting a brush holder are structurally improved to enable the brush holder to be easily and solidly inserted into the brush holder insertion hole of the first frame, thereby reducing the labor work of a soldering for connecting the stator winding.
US08063527B2
A gas turbine engine assembly includes an electromagnetic machine for extracting power from the turbine engine. The electromagnetic machine includes an outer rotor and an inner rotor rotatably supported adjacent to a stator disposed between the inner and outer rotors. The stator has an inner set of windings disposed on an inner surface adjacent to the inner rotor, and an outer set of windings on an outer surface of the stator adjacent to the outer rotor. The inner stator windings form a set of multiple-phase windings, and the outer stator windings form a set of multiple-phase windings.
US08063525B2
Disclosed is a retainer bearing (1) for retaining a rotor shaft of an electric machine. Said retainer bearing (1) comprises an outer bearing ring (2) and an inner bearing ring (5). At least one gliding element (7) which is preloaded in a radial direction of the retainer bearing (10) is inserted between the outer bearing ring (2) and the inner bearing ring (5).
US08063524B2
The motor including a stator having a stator core, and an insulator provided to the stator core for winding a coil thereon, a rotor rotatably provided with respect to the stator, and a tap terminal provided to the insulator for positioning an end of the coil, wherein the coil includes a core wire of aluminum.
US08063523B2
A pair of connecting wire hooks are disposed on both sides of a nozzle receiving groove in an extended slot space (a first extended space) to sandwich an extended portion of an extended virtual space (a third extended space). In this configuration, the pair of connecting wire hooks are not located within the third extended space. Thus, in the stator for rotary electric machine, the space factor of the winding portion may be increased in a situation where the connecting wire hook is disposed within the first extended space.
US08063522B2
A generator includes a rotor structure having a rotor frame that supports field turns and a rectifier assembly. The rotor frame includes an opening, and a bus bar passes through the opening and electrically connects the field turns and the rectifier assembly. A grounding bushing electrically connects the bus bar to the rotor frame.
US08063519B2
A cooling system for use in a vehicle drive assembly having an electric drive with a rotor and a stator is disclosed. The cooling system is adapted to cool the rotor via a liquid coolant or by directing a cooling air flow between the rotor and stator using an independent control capable of independent operation.
US08063517B2
The aim of the invention is to create a combined linear-rotary drive that has a compact, simple, and inexpensive design. Said aim is achieved by a combined drive comprising a linear driving device (3) and a rotary driving device (11), at least one of the two driving devices being provided with a hybrid reluctance motor. It is particularly advantageous to embody both driving devices as hybrid reluctance motors such that the rotor (4) can be produced at a low cost without permanent magnets in addition to ensuring that the drive has a very compact design.
US08063509B2
A power supply voltage adjusting apparatus includes a voltage setting part that, according to a characteristic variation of a semiconductor integrated circuit, sets a first power supply voltage of a first power supply domain module among a plurality of modules in the semiconductor integrated circuit, each module respectively having a different power supply voltage; a detecting part that compares phases of a first clock signal flowing through the first power supply domain module and a second clock signal flowing through a second power supply domain module to detect a phase difference; and a voltage adjusting part that adjusts a second power supply voltage supplied to the second power supply domain module to reduce the phase difference detected by the detecting part.
US08063502B1
A renewable energy system for converting wind power into electrical energy or other form of energy. The renewable energy system generally includes a first intake and a second intake, a shroud fluidly connected to the intakes by a first delivery tube and a second delivery tube respectively, and a turbine rotatably positioned within the shroud. The first delivery tube and the second delivery tube are fluidly connected to opposite sides of the shroud to provide the input of the pressurized air from the intakes into opposing portions of the turbine.
US08063501B2
A gas turbine engine includes a main compressor section for compressing air, a main combustor section positioned downstream of the main compressor section, a main turbine section positioned downstream of the main combustor section, and a spool extending from the main compressor section to the main turbine section. A second turbine is fluidically connected to the main compressor section by a bleed passage. An electrical generator is mechanically driven by both the spool and the second turbine.
US08063497B2
A chip having a bump layout suitable for the chip on glass technology and a driving IC includes a plurality of first bumps and a plurality of second bumps for electrically connecting to a glass substrate of a displayer. The first and second bumps are disposed on a surface of the chip and near two opposite long sides of the chip respectively. The ratio of the total contacting area of the first bumps to that of the second bumps is between 0.8 and 1.2. Thus, a pressure applied on the chip and the glass substrate of the displayer for connection can be uniformly exerted all over the chip, and the stability of the connection is therefore improved.
US08063489B2
In semiconductor integrated circuit devices for vehicle use or the like, in general, an aluminum pad on a semiconductor chip and an external device are coupled to each other by wire bonding or the like using a gold wire and the like for the convenience of mounting. Such a semiconductor integrated circuit device, however, causes a connection failure due to the interaction between aluminum and gold in use for a long time at a relatively high temperature (about 150 degrees C.). The invention of the present application provides a semiconductor integrated circuit device (semiconductor device or electron circuit device) which includes a semiconductor chip as a part of the device, an electrolytic gold plated surface film (gold-based metal plated film) provided over an aluminum-based bonding pad on a semiconductor chip via a barrier metal film, and a gold bonding wire (gold-based bonding wire) for interconnection between the plated surface film and an external lead provided over a wiring board or the like (wiring substrate).
US08063484B2
A semiconductor device, comprising: a semiconductor element 20 having a rectangular two-dimensional geometry and serving as a heat source; and a heat sink section 25 having the semiconductor element 20 mounted thereon, wherein a relation among the directional components of said thermal conductivity is: Kzz≧Kyy>Kxx, where directional components of three-dimensional thermal conductivity of the heat sink section 25 in X, Y and Z directions are determined as Kxx, Kyy and Kzz, and where the longer side direction of the semiconductor element 20 is defined as X direction, the shorter side direction thereof is defined as Y direction and the thickness direction is defined as Z direction.
US08063478B2
Chipping of semiconductor chips is to be prevented. A semiconductor device comprises a semiconductor chip having a main surface, a plurality of pads formed over the main surface, a rearrangement wiring formed over the main surface to alter an arrangement of the plurality of pads, and a protective film and an insulating film formed over the main surface, and a plurality of solder bumps each connected to the rearrangement wiring and arranged differently from the plurality of pads. The presence of a bevel cut surface obliquely continuous to the main surface and formed on a periphery of the main surface of the semiconductor chip prevents chipping.
US08063476B2
A semiconductor device includes a substrate having bumps on the backside thereof, a first semiconductor chip mounted on the surface of the substrate, a second semiconductor chip mounted on the first semiconductor chip above the surface of the substrate, a first bonding wire having a length L1 for connecting the first semiconductor chip to the substrate, a second bonding wire having a length L2 (where L2>L1) for connecting the second semiconductor chip to the substrate, a first resin seal having a dielectric constant ∈1 for sealing the first bonding wire, and a second resin seal having a dielectric constant ∈2 (where ∈2<∈1) for sealing the second bonding wire. The relationship between the lengths L1 and L2 and the dielectric constants ∈1 and ∈2 is defined by an equation of ∈1=∈2(L2/L1)2.
US08063467B2
In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes removing a portion of a semiconductor material to form a first protrusion and a cavity having a boundary that is below a surface of the semiconductor material, wherein the first protrusion extends from the boundary of the cavity. The method further includes forming a non-conformal material over a first portion of the first protrusion using an angled deposition of the non-conformal material, wherein the angle of deposition of the non-conformal material is non-perpendicular to the surface of the semiconductor material. Other embodiments are described and claimed.
US08063463B2
A method for encoding information that is encoded in spatial variations of the intensity of light characterized by a first wavelength in light characterized by a second wavelength, the method comprising: transmitting the first wavelength light through a photo-conducting material in which electron-hole pairs are generated by absorbing photons from the first wavelength light to generate a first density distribution of electrons homologous with the spatial variations in intensity of the first wavelength light; trapping electrons from the first electron density distributions in a trapping region to generate an electric field homologous with the density distribution in a material that modulates a characteristic of light that passes therethrough responsive to an electric field therein; transmitting a pulse of light having sufficient energy to generate electron-hole pairs in the photo-conducting material through the modulating material and thereafter through the photo-conducting layer to generate a second additional electron density homologous with the first electron density distribution; trapping electrons from the second electron density distribution in the trapping region; and transmitting the second wavelength light through the modulating material thereby modulating the second wavelength light in response to the electric field and encoding it with the information.
US08063453B2
A gate of a semiconductor device includes a substrate, and a polysilicon layer over the substrate, wherein the polysilicon layer is doped with first conductive type impurities having a concentration that decreases when receding from the substrate and counter-doped with second conductive type impurities having a concentration that increases when receding from the substrate.
US08063448B2
A memory device includes a multi gate field effect transistor (MuGFET) having a fin with a contact area. A programmable memory element abuts the fin contact area.
US08063441B2
A vertical pillar semiconductor device may include a substrate, a group of channel patterns, a gate insulation layer pattern and a gate electrode. The substrate may be divided into an active region and an isolation layer. A first impurity region may be formed in the substrate corresponding to the active region. The group of channel patterns may protrude from a surface of the active region and may be arranged parallel to each other. A second impurity region may be formed on an upper portion of the group of channel patterns. The gate insulation layer pattern may be formed on the substrate and a sidewall of the group of channel patterns. The gate insulation layer pattern may be spaced apart from an upper face of the group of channel patterns. The gate electrode may contact the gate insulation layer and may enclose a sidewall of the group of channel patterns.
US08063440B2
A power electronics power module is provided. The power electronics power module includes an electrically conductive substrate, a electronic die having first and second opposing surfaces and at least one transistor formed thereon, the electronic die being mounted to the electrically conductive substrate and the at least one transistor being configured such that when the at least one transistor is activated, current flows from the first surface of the electronic die into the electrically conductive substrate, and a control member at least partially imbedded in the electrically conductive substrate, the control member having a control conductor formed thereon and electrically connected to the at least one transistor such that when a control signal is provided to the control conductor, the at least one transistor is activated.
US08063433B2
A memory cell includes an ONO film composed of a stacked film of a silicon nitride film SIN which is a charge trapping portion and oxide films BOTOX and TOPOX positioned under and over the silicon nitride film, a memory gate electrode MG over the ONO film, a source region MS, and a drain region MD, and program or erase is performed by hot carrier injection in the memory cell. In the memory cell, a total concentration of N—H bonds and Si—H bonds contained in the silicon nitride film SIN is made to be 5×1020 cm−3 or less.
US08063424B2
An embedded photodetector apparatus for a three-dimensional complementary metal oxide semiconductor (CMOS) stacked chip assembly having a CMOS chip and one or more thinned CMOS layers is provided. At least one of the one or more thinned CMOS layers includes an active photodiode area defined within the one or more thinned CMOS layers, the active photodiode area being receptive of an optical signal incident thereon, and the active photodiode area comprising a bulk substrate portion of the thinned CMOS layer. The bulk substrate portion has a diode photodetector formed therein.
US08063421B2
Provided are a thin film transistor and a method of manufacturing the same. The thin film transistor may include a gate; a channel layer; a source and a drain, the source and the drain being formed of metal; and a metal oxide layer, the metal oxide layer being formed between the channel layer and the source and the drain. The metal oxide layer may have a gradually changing metal content between the channel layer and the source and the drain.
US08063410B2
A nitride semiconductor light-emitting device including a reflecting layer made of a dielectric material, a transparent conductive layer, a p-type nitride semiconductor layer, a light emitting layer and an n-type nitride semiconductor layer in this order and a method of manufacturing the same are provided. The transparent conductive layer is preferably made of a conductive metal oxide or an n-type nitride semiconductor, and the reflecting layer made of a dielectric material preferably has a multilayer structure obtained by alternately stacking a layer made of a dielectric material having a high refractive index and a layer made of a dielectric material having a low refractive index.
US08063404B2
A semiconductor memory device positioned on an SOI substrate. A semiconductor memory device includes two transistors with three terminals which serve as a source, a reading drain and a writing drain, respectively. The writing drain is heavily-doped for high writing efficiency. A floating body region for storing charges is also heavily-doped to reach long data retention time.
US08063397B2
Semiconductor light-emitting structures are shown on engineered substrates having a graded composition. The composition of the substrate may be graded to achieve a lattice constant on which a yellow-green light-emitting semiconductor material may be disposed. In some embodiments, the structure may be substantially free of aluminum.
US08063394B2
According to an embodiment, an integrated circuit including a plurality of resistance changing memory cells is disclosed. Each memory cell includes a first electrode, a second electrode and resistance changing memory element arranged between the first electrode and the second electrode. A front surface area of an end section of the first electrode that faces the resistance changing memory element is smaller than a front surface area of an end section of the second electrode that faces the resistance changing memory element.
US08063388B2
Provided is an ion implantation apparatus including a disk which rotates about a first axis, a pad which is rotatable about a second axis on the disk, and on which a substrate is placed with a holder attached to a circumference of the substrate, the holder including a weight, fixing pins which are each fixedly provided on a portion on the disk around the pad, a sliding piece which slides, by its own centrifugal force, on the disk with a rotational movement of the disk and thereby clamps the holder in cooperation with the fixing pins, and an ion beam generator which irradiates the substrate with ion beams.
US08063387B2
Disclosed is a radiation image conversion panel containing a support having thereon a phosphor layer containing an alkali metal halide phosphor which is deposited on the support by a gas phase accumulation method, wherein the alkali metal halide phosphor includes a columnar crystal and an existing ratio of an activation agent of the columnar crystal on a surface of the columnar crystal to an inner portion of the columnar crystal is from 0.7 to 20.
US08063386B2
A system and method that allows for time-resolved fluorescent imaging of fluorescent samples. The user is able to receive temporally filtered pictures of the sample with a reduced amount of the scattered excitation light and the short lived background fluorescence. The system allows for adjustment of fluorescent gating time and delay time.
US08063377B2
A detector for a nuclear imaging system includes a scintillator including an array of scintillator elements and a light guide including a grid which defines light guide elements. Light from scintillations in the scintillation crystal in response to received radiation, passes through the light guide and strikes light sensitive elements of a light sensitive element array. The light sensitive element array includes larger elements in an array in the center surrounded by smaller light sensitive elements located in a peripheral array around the central array.
US08063360B2
A data acquisition system and method are described that may be used with various spectrometers. The data acquisition system may include an ion detector, an initial processing module, and a spectra processing module. The initial processing module is provided for processing the ion detection signals and for supplying processed signals to the spectra processing module. The spectra processing module generates spectra from the processed signals and supplies the generated spectra to an external processor for post-processing. The spectra processing module may include one or more of: a cross-spectra filter for filtering data in each spectra as a function of data in at least one prior spectra; a shaping filter for removing skew and shoulders from the processed signals; a sharpening filter for sharpening the peaks of the processed signals to effectively deconvolve and separate overlapping peaks; an ion statistics filter; and a peak histogram filtering circuit.
US08063359B2
In one embodiment, a system and a method relate to generating a summed ion spectrum for a test sample, the summed ion spectrum identifying ion intensities at multiple different mass-to-charge ratios, and comparing the summed ion spectrum of the test sample with multiple reference summed ion spectra to identify a potential match.
US08063358B2
A method of mass spectrometry is disclosed wherein voltage signals from an ion detector are analyzed. A second differential of each voltage signal is obtained and the start and end times of observed voltage peaks are determined. The intensity and average time of each voltage peak is then determined and the intensity and time values are stored. An intermediate composite mass spectrum is then formed by combining the intensity and time values which relate to each voltage peak observed from multiple experimental runs. The various pairs of time and intensity data are then integrated to produce a smooth continuum mass spectrum. The continuum mass spectrum may then be further processed by determining the second differential of the continuum mass spectrum. The start and end times of mass peaks observed in the continuum mass spectrum may be determined. The intensity and mass to charge ratio of each mass peak observed in the continuum mass spectrum may then determined. A final discrete mass spectrum comprising just of an intensity value and mass to charge ratio per species of ion may then be displayed or output.
US08063346B2
Systems and methods are provided for projecting a virtual image of an object. A projector mounted on the object for projecting a light beam. A photographic plate is provided that includes an interference pattern imprinted onto at least one surface, wherein the interference pattern manipulates the light to form a hologram beam such that a detector detecting the hologram beam detects a virtual image of the object that has a light signature at a greater intensity than a light signature of the object.
US08063323B1
A circuit breaker replacement tool made of a cart with a base plate, wherein the base plate has at least two wheels. The cart has a right side and a left side with both sides connected on one end to the base plate. A height adjustable support arm holds a main linear actuator and an interlocking linear actuator for opening interlocks and installing or removing circuit breakers from circuit breaker cabinets.
US08063322B2
A position indicator is provided. The position indicator includes an external case, and a core having an indicating unit projecting outside of the case. The core is movably supported by the case. The core has a central axis extending along a lengthwise direction thereof. A guiding unit includes an inclined plane provided on one of the case and the core. An engaging unit is provided on the other one of the case and the core. The engaging unit is slidably engaged with the inclined plane such that the guiding unit guides movement of the core when external force is applied to the indicating unit of the core in a lateral direction with respect to the central axis of the core. A pressure detector is operably associated with the core for detecting pressure applied to the indicating unit based on the movement of the core with respect to the case via the guiding unit.
US08063317B2
A recessed electrical outlet box for mounting in a floor. The outlet box includes a body made at least partially of intumescent material and configured to retain at least one receptacle and a retention structure receiving the body. The retention structure is configured to retain the body within a hole in the floor and contain the expansion of the intumescent material.
US08063303B1
An electrical outlet safety cover for an electrical outlet that is attached to the outlet in place of traditional outlet covers. The outlet cover includes a slide that unlocks another slide containing holes that match prong holes on an outlet. Once the slide with the holes is moved into place, access to the outlet is granted and any electrical device can be plugged into the outlet.
US08063300B2
Solar panels and assembled arrays thereof include a collection of relatively compact, high-capacity power units. Optical components of each power unit include a front window or surface glazing, a primary mirror, secondary mirror and receiver assembly. Primary and secondary mirrors are defined by respective perimeters, at least a portion of which may be substantially coplanar and in contact with the front window. Some primary mirrors are configured with a perimeter of alternating full and truncated sections, and are curved to a base portion forming a pilot hole therein. Receiver assembly mechanical components include an alignment tube for mating with the primary mirror's pilot hole and for housing a photovoltaic solar cell. A base plate provided adjacent to the alignment tube serves to radiate heat emitted by the solar cell, and in some embodiments an additional heat sink provides further passive cooling. A tapered optical rod also provided within the receiver assembly directs received sunlight to the solar cell where electrical current is generated.
US08063299B2
It is an object of the present invention to easily and inexpensively provide a structure of effectively utilizing a light incident on an invalid area of a solar cell. Moreover, it is another object to improve output characteristics of the solar cell by effectively utilizing the light. The gist of the present invention resides in a solar battery module in which plate-like solar cells are held between a light penetrable sheet member on a light receiving surface side and a sheet member on a back surface side, and internal apertures are filled with a sealing resin, wherein a light diffusion section for diffusely reflecting a light or a light diffusion section of a white color is arranged in an invalid region of each solar cell.
US08063297B2
Improvements in a microphone system for a musical instrument and more particularly for a marimba or similar musical instrument. The microphone system includes a vibration isolation system. A horizontal tracking system bridges across the vertical supports of a marimba in a horizontal tracking system. One or more microphones are supported on the first bridging structure. The microphone(s) are positionally secured on the horizontal tracking system. Both the microphones and the horizontal tracking system provide vibration isolation to all of the microphones. A cable management system is also disclosed to reduce mechanical vibration and eliminate transmission of undesirable sounds.
US08063274B2
A soybean cultivar designated 8334328 is disclosed. The invention relates to the seeds of soybean cultivar 8334328, to the plants of soybean 8334328, to plant parts of soybean cultivar 8334328 and to methods for producing a soybean plant produced by crossing soybean cultivar 8334328 with itself or with another soybean variety. The invention also relates to methods for producing a soybean plant containing in its genetic material one or more transgenes and to the transgenic soybean plants and plant parts produced by those methods. This invention also relates to soybean cultivars or breeding cultivars and plant parts derived from soybean variety 8334328, to methods for producing other soybean cultivars, lines or plant parts derived from soybean cultivar 8334328 and to the soybean plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid soybean seeds, plants and plant parts produced by crossing the cultivar 8334328 with another soybean cultivar.
US08063272B2
A soybean cultivar designated 85331715 is disclosed. The invention relates to the seeds of soybean cultivar 85331715, to the plants of soybean 85331715, to plant parts of soybean cultivar 85331715 and to methods for producing a soybean plant produced by crossing soybean cultivar 85331715 with itself or with another soybean variety. The invention also relates to methods for producing a soybean plant containing in its genetic material one or more transgenes and to the transgenic soybean plants and plant parts produced by those methods. This invention also relates to soybean cultivars or breeding cultivars and plant parts derived from soybean variety 85331715, to methods for producing other soybean cultivars, lines or plant parts derived from soybean cultivar 85331715 and to the soybean plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid soybean seeds, plants and plant parts produced by crossing the cultivar 85331715 with another soybean cultivar.
US08063253B2
The invention relates to a process for selectively controlling the crystallisation mesotrione [2-(4-methylsulphonyl-2-nitrobenzoyl)cyclohexane-1,3-dione] from aqueous solution in which the aqueous mesotrione solution is introduced to a crystalliser containing seed crystals predominantly of the thermodynamically stable polymorph (“Form 1”) in a semi-continuous or continuous manner. The invention further relates to a process for converting the metastable polymorph (“Form 2”) of mesotrione to Form 1 by introducing an aqueous solution containing the former form to a crystalliser containing seed crystals predominantly of the latter form.
US08063249B1
The present invention is directed to compounds, compositions thereof, and the use of the compounds and compositions for the treatment and prevention of breast cancer. In one embodiment, the present invention relates to the use of a substituted triphenyl butene or prodrug thereof for the treatment of breast cancer in mono-therapy or in combination therapy, or for a reduction in the recurrence rate of previously-treated breast cancer.
US08063242B2
(R) and (S) 2-Aryl-propionic acids, and pharmaceutical compositions that contain them, are useful in inhibiting chemotactic activation of neutrophils (PMN leukocytes) induced by the interaction of Interleukin-8 (IL-8) with CXCR1 and CXCR2 membrane receptors. The acids are used for the prevention and treatment of pathologies deriving from said activation. In particular, the (R) enantiomers of said acids are lacking cyclo-oxygenase inhibition activity and are particularly useful in the treatment of neutrofil-dependent pathologies such as psoriasis, ulcerative colitis, melanoma, chronic obstructive pulmonary disease (COPD), bollous pemphigo, rheumatoid arthritis, idiopathic fibrosis, glomerulonephritis and in the prevention and treatment of damages caused by ischemia and reperfusion.
US08063234B2
The present application relates to novel 7-sulfanylmethyl-, 7-sulfinylmethyl- and 7-sulfonylmethylindole derivatives, processes for the preparation thereof, the use thereof alone or in combinations for the treatment and/or prevention of diseases, and the use thereof for the manufacture of medicaments for the treatment and/or prevention of diseases, especially for the treatment and/or prevention of cardiovascular disorders.
US08063214B2
A process for preparing crystalline Form A of tadalafil (I), comprising crystallization from a solution of tadalafil in a solvent comprising a C3-C7 ester, a ketone, dimethylformamide, dimethylsulfoxide, ethanol, acetonitrile, a chlorinated hydrocarbon, t-butanol, N,N-dimethylacetamide, dioxane, N-methyl pyrrolidone, or a mixture of any two or more thereof.
US08063212B2
The present invention provides novel imidazolidinonyl aminopyrimidine compounds believed to have clinical use for treatment of cancer through inhibiting Plk1. Formula I wherein: R1 is aminomethyl, (C1-C3 alkyl)aminomethyl, di(C1-C2 alkyl)aminomethyl, N-ethyl-N-methyl-aminomethyl, 1-aminoethyl, 1-((C1-C2 alkyl)amino)-ethyl, 3,3,3-trifluoro-propylaminomethyl, ethynyl, 2-hydroxy-ethoxy, 2-hydroxyethylaminomethyl, 2-cyanoethylaminomethyl, morpholin-4-ylmethyl, methoxymethoxymethyl, cyclopropyl, 1-azetidinylmethyl, 1-pyrrolidinylmethyl, or 1,3-dioxolan-2-yl; R2 is hydrogen or halo; R3 is hydrogen or halo; provided that at least one of R2 and R3 is hydrogen; R4 is hydrogen, methyl, or halo; and is a single bond that is either present or absent, or pharmaceutically acceptable salt thereof.
US08063206B2
The present invention is directed to novel processes for the preparation of cyclopropyl-amide derivatives, useful for the treatment of disorders and conditions mediated by the histamine receptor.
US08063205B2
The present invention is a method for producing a 2-oxazoline analogue or a 1,3-oxazine analogue represented by the following general formula (3) by reacting a 1,2-aminoalcohol compound or a 1,2-aminothiol compound with an α,α-dihaloamine compound.(In the formula, n represents 0 or 1, and R represents an oxygen atom or a sulfur atom. R1, R2 and R3 each represents an atom or a group shown in Group 1 to Group 3, and R0 represents an atom or a group shown in Group 2 or Group 3. Two or more of R1, R2 and R3 may be bonded to each other to form a ring.Group 1: a hydrogen atom, a halogen atom, a nitro group, a cyano group, a formyl group, a carboxyl group, a sulfonyl group, a sulfinoyl group or a sulfenyl group;Group 2: an alkyl group, which may have an arbitrary substituent, an aryl group or an aralkyl group; andGroup 3: an alkyl-substituted, aryl-substituted or aralkyl-substituted oxy group, a carbonyl group, an oxycarbonyl group, a carbonyloxy group, a thio group, a sulfonyl group, a sulfinoyl group or a sulfenyl group)
US08063202B2
Glycopeptide having at least one asparagine-linked oligosaccharide at a desired position of the peptide chain obtained by: (1) esterifying hydroxyl of a resin and carboxyl of ah amino acid having amino group nitrogen protected with a fat-soluble protective group (AGFPG), (2) removing the protective group to form a free amino group, (3) amidating the free amino group and carboxyl of an amino acid having AGFPG, (4) removing the protective group, (5) repeating the steps (3) and (4), (6) amidating the free amino group and carboxyl of the asparagine portion of an asparagine-linked oligosaccharide having AGFPG, (7) removing the protective group, (8) amidating the free amino group and carboxyl of an amino acid having AGFPG, (9) repeating steps (7) and (8), (10) removing the protective group, and (11) cutting off the resin with an acid; glycopeptide obtained by transferring sialic acid or a derivative thereof to the above glycopeptide.
US08063197B2
Nucleic acid oligomeric sequences and in vitro nucleic acid amplification and detection methods for detecting the presence of HAV RNA sequences in samples are disclosed. Kits comprising nucleic acid oligomers for amplifying and detecting HAV nucleic acid sequences are disclosed.
US08063193B2
The present invention is directed to novel polynucleotides and polypeptides directed to EXP1 of Plasmodium vivax, and methods of using these polynucleotides and polypeptides in the detection of P. vivax antibodies or anti-P. vivax antibodies in a subject. The invention finds particular useful application in identifying recent exposure to P. vivax.
US08063192B2
Compositions and methods are provided that relate to the bioremediation of chlorinated ethenes, particularly the bioremediation of vinyl chloride by Dehalococcoides-like organisms. An isolated strain of bacteria, Dehalococcoides sp. strain VS, that metabolizes vinyl chloride is provided; the genetic sequence of the enzyme responsible for vinyl chloride dehalogenation; methods of assessing the capability of endogenous organisms at an environmental site to metabolize vinyl chloride; and a method of using the strains of the invention for bioremediation.
US08063184B2
The present invention provides novel cleavage agents and polymerases for the cleavage and modification of nucleic acid. The cleavage agents and polymerases find use, for example, for the detection and characterization of nucleic acid sequences and variations in nucleic acid sequences. In some embodiments, the 5′ nuclease activity of a variety of enzymes is used to cleave a target-dependent cleavage structure, thereby indicating the presence of specific nucleic acid sequences or specific variations thereof.
US08063182B1
The present invention is concerned with non-soluble proteins and soluble or insoluble fragments thereof, which bind TNF, in homogeneous form, as well as their physiologically compatible salts, especially those proteins having a molecular weight of about 55 or 75 kD (non-reducing SDS-PAGE conditions), a process for the isolation of such proteins, antibodies against such proteins, DNA sequences which code for non-soluble proteins and soluble or non-soluble fragments thereof, which bind TNF, as well as those which code for proteins comprising partly of a soluble fragment, which binds TNF, and partly of all domains except the first of the constant region of the heavy chain of human immunoglobulins and the recombinant proteins coded thereby as well as a process for their manufacture using transformed pro- and eukaryotic host cells.
US08063181B2
The invention at hand describes a method for the cyclization of peptides and proteins in which linear thioesters serve as substrates. The cyclization is catalyzed by thioesterase domains of NRPS or PKS cyclases. The substrates according to the present invention are composed of one linear peptide on which a charge-stabilized aromatic, heteroaromatic or araliphatic leaving group is bound. These substrates lead to higher yields and reaction rates than linear peptides able to be cyclized with methods known so far and, furthermore, allow the cyclization of such peptides which were previously not able to be cyclized.
US08063166B2
Polydiorganosiloxane polyamide, block copolymers having organic soft segments and methods of making the copolymers are provided.
US08063159B2
Disclosed is a process for making a Ziegler-Natta catalyst having controlled particle size and distribution. It comprises altering the precipitation of a catalyst component from a catalyst synthesis solution including a soluble magnesium containing catalyst precursor by controlling the concentration of either the soluble magnesium containing catalyst precursor, wherein the average particle size of the catalyst component is increased, and the particle size distribution increased, with a decreased concentration of the soluble magnesium containing catalyst precursor; or of the precipitating agent, wherein the average particle size of the catalyst component is increased, and the particle size distribution increased with an increased concentration of the precipitating agent. Use of the invention enables improved catalyst consistency regardless of production scale and customizing of catalyst morphology to desired polymer morphology. The novel catalyst components may be used to prepare polymers, and end-use articles therefrom, having desirable properties.
US08063153B2
A functionalized polymer includes an elastomer, a terminal functional group including at least one heteroatom, and a unit intermediate the elastomer and the functional group; the intermediate unit includes a terminal moiety which, in its anionic form, is less basic than a secondary amino radical ion. Methods of making the functionalized polymer and of using it with particulate filler to make, e.g., a tire tread composition also are disclosed.
US08063147B2
An object is to provide a transmission belt which is restrained from being deteriorated in a high-temperature atmosphere, is excellent in softness in a low-temperature atmosphere, and is hardly worn away. To attain the object, the invention provides a transmission belt made of a rubber composition wherein the ratio by weight of a Ziegler-Natta catalyst type ethylene/α-olefin copolymer rubber, which is an ethylene/α-olefin copolymer rubber obtained by polymerization in the presence of a Ziegler-Natta catalyst, to a metallocene type ethylene/α-olefin copolymer rubber, which is an ethylene/α-olefin copolymer rubber obtained by polymerization in the presence of a metallocene catalyst, is from 50/50 to 90/10.
US08063134B2
A packaging material or flexible medical tubing containing a modified graphite oxide material, which is a thermally exfoliated graphite oxide with a surface area of from about 300 m2/g to 2600 m2/g.
US08063130B2
A pump or valve gasket for a fluid dispenser device, said gasket comprising at least one elastomer and at least one basic inorganic filler having pH that is greater than or equal to 8.
US08063121B2
The present invention relates to a process for the production of a superabsorbent polymer comprising preparing an aqueous mixture of monomers selected to provide after polymerization a superabsorbent polymer; feeding said monomer mixture to a reactor; subjecting the aqueous monomer mixture in the reactor to free-radical polymerization to obtain a superabsorbent polymer gel; removing the superabsorbent polymer gel from the reactor; and drying the superabsorbent polymer gel. Where at least one off-gas stream removed from any stage of the process is subjected to scrubbing with a basic aqueous solution prior to venting to obtain an aqueous scrubber solution that is at least partially recycled to any of the above steps of the process.
US08063119B2
Barrier coating mixtures contain in a carrier liquid, (a) a non-elastomeric polymer; (b) an exfoliated layered platelet-like silicate filler which may or may not have been acid or base treated that has not been functionalized with organic cations having an aspect ratio greater than 25; and (c) at least one additive, wherein the total solids content is less than 30% and the amount of filler is between 5% to about 60% of the total solids content. Coated articles and containers, freestanding films and packaging films are produced using the barrier coating mixtures. Methods of manufacturing such coated products are also encompassed.
US08063117B2
The present invention relates to an artificial marble comprising a base resin part; and a pearl stripe part which contains a matrix resin and pearls, and expresses stripes on said base resin part by the contained pearls and a process for preparing the same. The present invention may provide an artificial marble, which can embody higher grade appearance effects by concentrating pearl into the parts expressing stripes of the artificial marble and freely regulating color, quality of pearl and/or patterns of stripes, and a process for preparing the same.
US08063116B2
An improved method for fixedly coating powder coating prepolymer and/or polymer particles with microparticles of solid, heat absorbing polymer additive materials, especially antimicrobial additive materials.
US08063115B2
A radiation curable composition comprising a curable compound, a photo-initiator and a co-initiator, wherein said co-initiator has a structure according to Formula I A-L-B Formula I wherein A represents a structural moiety comprising an aromatic tertiary amine; B represents a structural moiety comprising at least one aliphatic tertiary amine; L represents a divalent linking group positioning the nitrogen atom of the aromatic amine of the structural moiety A and the nitrogen of at least one aliphatic amine of the structural moiety B in a 1-3 to 1-23 position; with the proviso that at least one aromatic and at least one aliphatic amine each have at least one alfa-hydrogen.
US08063102B2
The present invention relates to novel tetrahydronaphthalen-2-ol derivatives, to pharmaceutical compositions comprising these compounds and to their use in therapy, in particular to their use for the manufacture of a medicament for the prevention or treatment of lower urinary tract symptoms, benign prostate hyperplasia, prostate cancer, hot flushes, anxiety, depression, breast cancer, medullary thyroid carcinoma, ovarian cancer, inflammatory bowel disease, arthritis, endometriosis, and colon cancer.
US08063099B2
The invention relates to novel trans-3-aza-bicyclo[3.1.0]hexane derivatives of formula (I), wherein A, B, n and R1 are as described in the description, and to the use of such compounds, or of pharmaceutically acceptable salts of such compounds, as medicaments, especially as orexin receptor antagonists.
US08063086B2
Compounds of Formula 1 where X is S and the variables have the meaning defined in the specification are specific or selective to alpha2B and/or alpha2C adrenergic receptors in preference over alpha2A adrenergic receptors, and as such have no or only minimal cardiovascular and/or sedatory activity. These compounds of Formula 1 are useful as medicaments in mammals, including humans, for treatment of diseases and or alleviations of conditions which are responsive to treatment by agonists of alpha2B adrenergic receptors. Compounds of Formula 1 where X is O also have the advantageous property that they have no or only minimal cardiovascular and/or sedatory activity and are useful for treating pain and other conditions with no or only minimal cardiovascular and/or sedatory activity.
US08063082B2
Chemical entities that modulate smooth muscle myosin and/or non-muscle myosin, pharmaceutical compositions and methods of treatment of diseases and conditions associated with smooth muscle myosin and/or non-muscle myosin are described.
US08063074B2
Polymorphic crystalline Forms J, K, L, M, and N of esomeprazole sodium.
US08063070B2
The present invention of compounds of formula (I) a stereochemically isomeric form thereof, an N-oxide form thereof or a pharmaceutically acceptable acid addition salt thereof. Processes for preparing said products, formulations comprising said products and their use as a medicine are disclosed, in particular for treating conditions which are related to impairment of gastric emptying.
US08063066B2
Compounds are provided for use with MEK that comprise: wherein the variables are as defined herein. Also provided are pharmaceutical compositions, kits and articles of manufacture comprising such compounds; methods and intermediates useful for making the compounds; and methods of using said compounds.
US08063062B2
Embodiments of this invention relate to compounds having a combination of cannabinoid-CB1 antagonism and cholinesterase inhibition, to pharmaceutical compositions comprising these compounds, to methods for preparing these compounds, methods for preparing novel intermediates useful for the synthesis of these compounds, and methods for preparing compositions comprising these compounds. The invention also relates to methods of treating Alzheimer's disease, cognitive disorders, memory disorders, dementia, attention deficit disorder, traumatic brain injury, drug dependence, addiction or substance abuse by administering a pharmaceutical composition comprising these compounds to a patient in need thereof. A compound with a combination of cannabinoid-CB1 antagonism and cholinesterase inhibition is a compound of formula (1) wherein the symbols have the meanings given in the specification.
US08063054B2
A composition including diazoxide (7-chloro-3-methyl-2H-1,2,4-benzothiadiazine-1,1-dioxide) for the treatment and/or prevention of retinal ischemia and of diseases associated with retinal ischemia. The composition can also contain riluzole, a derivative active in neuroprotection of the latter, or a pharmaceutically acceptable salt of the latter.
US08063042B2
The invention is concerned with novel heterocyclyl compounds of formula (I) wherein A, X, Y, R3, R4, R5, R6, R7, R8, R9, R10, m and n are as herein defined, as well as physiologically acceptable salts thereof. These compounds are antagonists of CCR2 receptor, CCR5 receptor and/or CCR3 receptor and can be used as medicaments.
US08063041B2
The present disclosure relates to polymorphic Form D of bazedoxifene acetate, pharmaceutical compositions and methods of treatment using the same, and methods of preparing the same.
US08063040B2
Novel triazabenzo[e]azulene derivatives of the formula, (I) in which R1, R2 and R3 have the meanings indicated in Claim 1, are inhibitors of TGF-beta receptor kinase and can be employed, inter alia, for the treatment of tumors.
US08063033B2
Compounds comprising or a pharmaceutically acceptable salt or a prodrug thereof, are disclosed, wherein Y is A is —(CH2)6—, cis —CH2CH═CH—(CH2)3—, or —CH2C≡C—(CH2)3—, wherein 1 or 2 carbon atoms may be substituted with S or O; or A is —(CH2)m—Ar—(CH2)o— wherein Ar is substituted or unsubstituted phenyl or monocyclic heteroaryl, the sum of m and o is from 1 to 4, and wherein one CH2 may be replaced with S or O; X is S or O; R is a hydrocarbyl or a hydroxyhydrocarbyl moiety having from 1 to 12 carbon atoms; D is independently a moiety comprising from 1 to 6 non-hydrogen atoms; and n is an integer from 0 to 4. Methods, compositions, and medicaments related thereto are also disclosed.
US08063032B2
Provided herein are fused imidazolyl compounds, methods of synthesis, and methods of use thereof. The compounds provided herein are useful for the treatment, prevention, and/or management of various disorders, such as neurological disorders and metabolic disorders. Compounds provided herein inhibit the activity of histamine H3 receptors and modulate the release of various neurotransmitters, such as histamine, acetylcholine, norepinephrine, and dopamine (e.g. at the synapse). Pharmaceutical formulations containing the compounds and their methods of use are also provided herein.